| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/arm/mediatek/mediatek,imp_iic_wrap.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: MediaTek IMP I2C Wrapper Controller |
| |
| maintainers: |
| - Weiyi Lu <weiyi.lu@mediatek.com> |
| |
| description: |
| The Mediatek imp i2c wrapper controller provides functional configurations and clocks to the system. |
| |
| properties: |
| compatible: |
| items: |
| - enum: |
| - mediatek,mt8192-imp_iic_wrap_c |
| - mediatek,mt8192-imp_iic_wrap_e |
| - mediatek,mt8192-imp_iic_wrap_s |
| - mediatek,mt8192-imp_iic_wrap_ws |
| - mediatek,mt8192-imp_iic_wrap_w |
| - mediatek,mt8192-imp_iic_wrap_n |
| - const: syscon |
| |
| reg: |
| maxItems: 1 |
| |
| '#clock-cells': |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| |
| examples: |
| - | |
| imp_iic_wrap_c: syscon@11007000 { |
| compatible = "mediatek,mt8192-imp_iic_wrap_c", "syscon"; |
| reg = <0 0x11007000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
| |
| - | |
| imp_iic_wrap_e: syscon@11cb1000 { |
| compatible = "mediatek,mt8192-imp_iic_wrap_e", "syscon"; |
| reg = <0 0x11cb1000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
| |
| - | |
| imp_iic_wrap_s: syscon@11d03000 { |
| compatible = "mediatek,mt8192-imp_iic_wrap_s", "syscon"; |
| reg = <0 0x11d03000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
| |
| - | |
| imp_iic_wrap_ws: syscon@11d23000 { |
| compatible = "mediatek,mt8192-imp_iic_wrap_ws", "syscon"; |
| reg = <0 0x11d23000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
| |
| - | |
| imp_iic_wrap_w: syscon@11e01000 { |
| compatible = "mediatek,mt8192-imp_iic_wrap_w", "syscon"; |
| reg = <0 0x11e01000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
| |
| - | |
| imp_iic_wrap_n: syscon@11f02000 { |
| compatible = "mediatek,mt8192-imp_iic_wrap_n", "syscon"; |
| reg = <0 0x11f02000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
