| // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| /* |
| * Copyright (C) 2020 MediaTek Inc. |
| * Author: Seiya Wang <seiya.wang@mediatek.com> |
| */ |
| /dts-v1/; |
| #include <dt-bindings/gpio/gpio.h> |
| #include "mt8192.dtsi" |
| #include "mt6359.dtsi" |
| |
| / { |
| model = "MediaTek Asurada rev1 board"; |
| compatible = "google,asurada-rev1", "google,asurada", "mediatek,mt6873"; |
| |
| aliases { |
| serial0 = &uart0; |
| }; |
| |
| backlight_lcd0: backlight_lcd0 { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm0 0 500000>; |
| power-supply = <&ppvar_sys>; |
| enable-gpios = <&pio 152 0>; |
| brightness-levels = < 0 1023 >; |
| num-interpolated-steps = <1023>; |
| default-brightness-level = <576>; |
| status = "okay"; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| dmic_codec: dmic-codec { |
| compatible = "dmic-codec"; |
| num-channels = <2>; |
| wakeup-delay-ms = <50>; |
| }; |
| |
| memory@40000000 { |
| device_type = "memory"; |
| reg = <0 0x40000000 0 0x80000000>; |
| }; |
| |
| sound: mt8192-sound { |
| mediatek,platform = <&afe>; |
| mediatek,hdmi-codec = <&anx_bridge_dp>; |
| pinctrl-names = "aud_clk_mosi_off", |
| "aud_clk_mosi_on", |
| "aud_dat_mosi_off", |
| "aud_dat_mosi_on", |
| "aud_dat_miso_off", |
| "aud_dat_miso_on", |
| "vow_dat_miso_off", |
| "vow_dat_miso_on", |
| "vow_clk_miso_off", |
| "vow_clk_miso_on", |
| "aud_nle_mosi_off", |
| "aud_nle_mosi_on", |
| "aud_dat_miso2_off", |
| "aud_dat_miso2_on", |
| "aud_gpio_i2s0_off", |
| "aud_gpio_i2s0_on", |
| "aud_gpio_i2s1_off", |
| "aud_gpio_i2s1_on", |
| "aud_gpio_i2s2_off", |
| "aud_gpio_i2s2_on", |
| "aud_gpio_i2s3_off", |
| "aud_gpio_i2s3_on", |
| "aud_gpio_i2s5_off", |
| "aud_gpio_i2s5_on", |
| "aud_gpio_i2s6_off", |
| "aud_gpio_i2s6_on", |
| "aud_gpio_i2s7_off", |
| "aud_gpio_i2s7_on", |
| "aud_gpio_i2s8_off", |
| "aud_gpio_i2s8_on", |
| "aud_gpio_i2s9_off", |
| "aud_gpio_i2s9_on", |
| "aud_dat_mosi_ch34_off", |
| "aud_dat_mosi_ch34_on", |
| "aud_dat_miso_ch34_off", |
| "aud_dat_miso_ch34_on", |
| "aud_gpio_tdm_off", |
| "aud_gpio_tdm_on"; |
| pinctrl-0 = <&aud_clk_mosi_off>; |
| pinctrl-1 = <&aud_clk_mosi_on>; |
| pinctrl-2 = <&aud_dat_mosi_off>; |
| pinctrl-3 = <&aud_dat_mosi_on>; |
| pinctrl-4 = <&aud_dat_miso_off>; |
| pinctrl-5 = <&aud_dat_miso_on>; |
| pinctrl-6 = <&vow_dat_miso_off>; |
| pinctrl-7 = <&vow_dat_miso_on>; |
| pinctrl-8 = <&vow_clk_miso_off>; |
| pinctrl-9 = <&vow_clk_miso_on>; |
| pinctrl-10 = <&aud_nle_mosi_off>; |
| pinctrl-11 = <&aud_nle_mosi_on>; |
| pinctrl-12 = <&aud_dat_miso2_off>; |
| pinctrl-13 = <&aud_dat_miso2_on>; |
| pinctrl-14 = <&aud_gpio_i2s0_off>; |
| pinctrl-15 = <&aud_gpio_i2s0_on>; |
| pinctrl-16 = <&aud_gpio_i2s1_off>; |
| pinctrl-17 = <&aud_gpio_i2s1_on>; |
| pinctrl-18 = <&aud_gpio_i2s2_off>; |
| pinctrl-19 = <&aud_gpio_i2s2_on>; |
| pinctrl-20 = <&aud_gpio_i2s3_off>; |
| pinctrl-21 = <&aud_gpio_i2s3_on>; |
| pinctrl-22 = <&aud_gpio_i2s5_off>; |
| pinctrl-23 = <&aud_gpio_i2s5_on>; |
| pinctrl-24 = <&aud_gpio_i2s6_off>; |
| pinctrl-25 = <&aud_gpio_i2s6_on>; |
| pinctrl-26 = <&aud_gpio_i2s7_off>; |
| pinctrl-27 = <&aud_gpio_i2s7_on>; |
| pinctrl-28 = <&aud_gpio_i2s8_off>; |
| pinctrl-29 = <&aud_gpio_i2s8_on>; |
| pinctrl-30 = <&aud_gpio_i2s9_off>; |
| pinctrl-31 = <&aud_gpio_i2s9_on>; |
| pinctrl-32 = <&aud_dat_mosi_ch34_off>; |
| pinctrl-33 = <&aud_dat_mosi_ch34_on>; |
| pinctrl-34 = <&aud_dat_miso_ch34_off>; |
| pinctrl-35 = <&aud_dat_miso_ch34_on>; |
| pinctrl-36 = <&aud_gpio_tdm_off>; |
| pinctrl-37 = <&aud_gpio_tdm_on>; |
| }; |
| |
| panel: panel { |
| compatible = "auo,b116xw03"; |
| power-supply = <&pp3300_panel>; |
| ddc-i2c-bus = <&i2c3>; |
| backlight = <&backlight_lcd0>; |
| |
| port { |
| panel_in: endpoint { |
| remote-endpoint = <&anx7625_out>; |
| }; |
| }; |
| }; |
| |
| pp1000_dpbrdg: pp1000-dpbrdg { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp1000_dpbrdg"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp1000_dpbrdg_en>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 19 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| pp1000_mipibrdg: pp1000-mipibrdg { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp1000_mipibrdg"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp1000_mipibrdg_en>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 129 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| /* system wide LDO 1.8V power rail */ |
| pp1800_ldo_g: pp1800-ldo-g { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp1800_ldo_g"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| vin-supply = <&pp3300_g>; |
| }; |
| |
| pp1800_dpbrdg: pp1800-dpbrdg { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp1800_dpbrdg"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp1800_dpbrdg_en>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 126 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| pp1800_mipibrdg: pp1800-mipibrdg { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp1800_mipibrdg"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp1800_mipibrdg_en>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 128 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| pp3300_dpbrdg: pp3300-dpbrdg { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp3300_dpbrdg"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp3300_dpbrdg_en>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 26 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| /* system wide switching 3.3V power rail */ |
| pp3300_g: pp3300-g { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp3300_g"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&ppvar_sys>; |
| }; |
| |
| /* system wide LDO 3.3V power rail */ |
| pp3300_ldo_z: pp3300-ldo-z { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp3300_ldo_z"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&ppvar_sys>; |
| }; |
| |
| pp3300_mipibrdg: pp3300-mipibrdg { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp3300_mipibrdg"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp3300_mipibrdg_en>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 127 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| /* Probably useless, as we use pp3300_mipibrdg for panel power */ |
| pp3300_panel: pp3300-panel { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp3300_panel"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pp3300_panel_pins>; |
| |
| enable-active-high; |
| regulator-boot-on; |
| |
| gpio = <&pio 136 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| /* separately switched 3.3V power rail */ |
| pp3300_u: pp3300-u { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp3300_u"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| /* enable pin wired to GPIO controlled by EC */ |
| vin-supply = <&pp3300_g>; |
| }; |
| |
| /* system wide switching 5.0V power rail */ |
| pp5000_a: pp5000-a { |
| compatible = "regulator-fixed"; |
| regulator-name = "pp5000_a"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| vin-supply = <&ppvar_sys>; |
| }; |
| |
| /* system wide semi-regulated power rail from battery or USB */ |
| ppvar_sys: ppvar-sys { |
| compatible = "regulator-fixed"; |
| regulator-name = "ppvar_sys"; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| reserved_memory: reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| scp_mem_reserved: scp_mem_region { |
| compatible = "shared-dma-pool"; |
| reg = <0 0x50000000 0 0x2900000>; |
| no-map; |
| }; |
| |
| wifi_restricted_dma_region: wifi_restricted_dma_region { |
| compatible = "restricted-dma-pool"; |
| reg = <0 0xC0000000 0 0x4000000>; |
| }; |
| }; |
| }; |
| |
| &afe { |
| i2s9-share = "I2S8"; |
| }; |
| |
| &dpi0 { |
| pinctrl-names = "sleep", "default"; |
| pinctrl-0 = <&dpi_pin_default>; |
| pinctrl-1 = <&dpi_pin_func>; |
| status = "okay"; |
| ports { |
| port { |
| dpi_out: endpoint { |
| remote-endpoint = <&anx7625_dp_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &dsi0 { |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ports { |
| port { |
| dsi_out: endpoint { |
| remote-endpoint = <&anx7625_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &gpu { |
| supply-names = "mali","sram"; |
| mali-supply = <&mt6315_7_vbuck1>; |
| sram-supply = <&mt6359_vsram_others_ldo_reg>; |
| operating-points-v2 = <&gpu_opp_table>; |
| power_model@0 { |
| compatible = "arm,mali-simple-power-model"; |
| static-coefficient = <162868>; |
| dynamic-coefficient = <2649>; |
| ts = <(-199560) 37873 (-665) 9>; |
| thermal-zone = "soc_max"; |
| }; |
| power_model@1 { |
| compatible = "arm,mali-tnax-power-model"; |
| scale = <5>; |
| }; |
| }; |
| |
| &i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| touchscreen: touchscreen@10 { |
| compatible = "hid-over-i2c"; |
| reg = <0x10>; |
| interrupt-parent = <&pio>; |
| interrupts = <21 IRQ_TYPE_LEVEL_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&touchscreen_pins>; |
| |
| post-power-on-delay-ms = <10>; |
| hid-descr-addr = <0x0001>; |
| |
| vdd-supply = <&pp3300_u>; |
| }; |
| }; |
| |
| &i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_pins>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| }; |
| |
| &i2c2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c2_pins>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| clock-stretch-ns = <12600>; |
| |
| touchpad@15 { |
| compatible = "elan,ekth3000"; |
| reg = <0x15>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&touchpad_pins>; |
| |
| interrupt-parent = <&pio>; |
| interrupts = <15 IRQ_TYPE_LEVEL_LOW>; |
| |
| vcc-supply = <&pp3300_u>; |
| |
| wakeup-source; |
| }; |
| |
| }; |
| |
| &i2c3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c3_pins>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| anx_bridge: anx7625@58 { |
| compatible = "analogix,anx7625"; |
| reg = <0x58>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&anx7625_pins>; |
| panel_flags = <1>; |
| enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>; |
| reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>; |
| vdd10-supply = <&pp1000_mipibrdg>; |
| vdd18-supply = <&pp1800_mipibrdg>; |
| vdd33-supply = <&pp3300_mipibrdg>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| port@0 { |
| reg = <0>; |
| anx7625_in: endpoint { |
| remote-endpoint = <&dsi_out>; |
| bus-type = <5>; |
| data-lanes = <0 1 2 3>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| anx7625_out: endpoint { |
| remote-endpoint = <&panel_in>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c6 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c6_pins>; |
| status = "okay"; |
| clock-frequency = <100000>; |
| |
| /* TODO: Add SAR sensor. */ |
| }; |
| |
| &i2c7 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c7_pins>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| anx_bridge_dp: anx7625@58 { |
| compatible = "analogix,anx7625"; |
| reg = <0x58>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&anx7625_dp_pins>; |
| enable-gpios = <&pio 8 GPIO_ACTIVE_HIGH>; |
| reset-gpios = <&pio 9 GPIO_ACTIVE_HIGH>; |
| interrupt-parent = <&pio>; |
| interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
| vdd10-supply = <&pp1000_dpbrdg>; |
| vdd18-supply = <&pp1800_dpbrdg>; |
| vdd33-supply = <&pp3300_dpbrdg>; |
| |
| analogix,lane0-swing = <0x14 0x54 0x64 0x74 |
| 0x29 0x7b 0x77 0x5b |
| 0x7f 0x7f 0x3f 0x3c |
| 0x20 0x60 0x3c 0x25 |
| 0x60 0x2c 0x40 0x60>; |
| analogix,lane1-swing = <0x14 0x54 0x64 0x74 |
| 0x29 0x7b 0x77 0x5b |
| 0x7f 0x7f 0x3f 0x3c |
| 0x20 0x60 0x3c 0x25 |
| 0x60 0x2c 0x40 0x60>; |
| anx,tx-rx-to-two-ports; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| anx7625_dp_in: endpoint { |
| remote-endpoint = <&dpi_out>; |
| }; |
| }; |
| }; |
| |
| anx_mux0 { |
| compatible = "typec-mode-switch"; |
| reg = <0>; |
| accessory; |
| |
| port { |
| anx_typec0: endpoint { |
| remote-endpoint = <&typec_port0>; |
| }; |
| }; |
| }; |
| |
| anx_mux1 { |
| compatible = "typec-mode-switch"; |
| reg = <1>; |
| accessory; |
| |
| port { |
| anx_typec1: endpoint { |
| remote-endpoint = <&typec_port1>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &mfg0 { |
| domain-supply = <&mt6315_7_vbuck1>; |
| }; |
| |
| &mipi_tx0 { |
| status = "okay"; |
| }; |
| |
| &mmc0 { |
| status = "okay"; |
| pinctrl-names = "default", "state_uhs"; |
| pinctrl-0 = <&mmc0_pins_default>; |
| pinctrl-1 = <&mmc0_pins_uhs>; |
| bus-width = <8>; |
| max-frequency = <200000000>; |
| cap-mmc-highspeed; |
| mmc-hs200-1_8v; |
| mmc-hs400-1_8v; |
| supports-cqe; |
| mmc-hs400-enhanced-strobe; |
| cap-mmc-hw-reset; |
| hs400-ds-delay = <0x12814>; |
| no-sdio; |
| no-sd; |
| vmmc-supply = <&mt6359_vemc_1_ldo_reg>; |
| vqmmc-supply = <&mt6359_vufs_ldo_reg>; |
| non-removable; |
| }; |
| |
| &mmc1 { |
| status = "okay"; |
| pinctrl-names = "default", "state_uhs"; |
| pinctrl-0 = <&mmc1_pins_default>; |
| pinctrl-1 = <&mmc1_pins_uhs>; |
| bus-width = <4>; |
| max-frequency = <200000000>; |
| cap-sd-highspeed; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>; |
| vmmc-supply = <&mt6360_ldo5_reg>; |
| vqmmc-supply = <&mt6360_ldo3_reg>; |
| no-mmc; |
| no-sdio; |
| }; |
| |
| /* for CORE */ |
| &mt6359_vgpu11_buck_reg { |
| regulator-always-on; |
| }; |
| |
| &mt6359_vgpu11_sshub_buck_reg { |
| regulator-always-on; |
| regulator-min-microvolt = <575000>; |
| regulator-max-microvolt = <575000>; |
| }; |
| |
| &mt6359_vrf12_ldo_reg { |
| regulator-always-on; |
| }; |
| |
| &mt6359_vufs_ldo_reg { |
| regulator-always-on; |
| }; |
| |
| &mt6359codec { |
| mediatek,dmic-mode = <1>; /* one-wire */ |
| mediatek,mic-type-0 = <2>; /* DMIC */ |
| mediatek,mic-type-2 = <2>; /* DMIC */ |
| }; |
| |
| &nor_flash { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&nor_gpio1_pins>; |
| assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>; |
| assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>; |
| |
| flash@0 { |
| compatible = "winbond,w25q64", "jedec,spi-nor"; |
| reg = <0>; |
| spi-max-frequency = <52000000>; |
| spi-rx-bus-width = <2>; |
| spi-tx-bus-width = <2>; |
| }; |
| }; |
| |
| &pcie { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie_pinmux>; |
| |
| pcie0: pcie@0,0 { |
| device_type = "pci"; |
| reg = <0x0000 0 0 0 0>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| ranges; |
| num-lanes = <1>; |
| bus-range = <0x1 0x1>; |
| |
| rtw_wifi: rtw_wifi@0,0 { |
| reg = <0x83010000 0x0 0x00000000 0x0 0x00100000 |
| 0x83010000 0x0 0x00100000 0x0 0x00100000>; |
| memory-region = <&wifi_restricted_dma_region>; |
| }; |
| }; |
| }; |
| |
| &pio { |
| /* 220 lines */ |
| gpio-line-names = "I2S_DP_LRCK", |
| "IS_DP_BCLK", |
| "I2S_DP_MCLK", |
| "I2S_DP_DATAOUT", |
| "SAR0_INT_ODL", |
| "EC_AP_INT_ODL", |
| "EDPBRDG_INT_ODL", |
| "DPBRDG_INT_ODL", |
| "DPBRDG_PWREN", |
| "DPBRDG_RST_ODL", |
| "I2S_HP_MCLK", |
| "I2S_HP_BCK", |
| "I2S_HP_LRCK", |
| "I2S_HP_DATAIN", |
| /* |
| * AP_FLASH_WP_L is crossystem ABI. Schematics |
| * call it AP_FLASH_WP_ODL. |
| */ |
| "AP_FLASH_WP_L", |
| "TRACKPAD_INT_ODL", |
| "EC_AP_HPD_OD", |
| "SD_CD_ODL", |
| "HP_INT_ODL_ALC", |
| "EN_PP1000_DPBRDG", |
| "AP_GPIO20", |
| "TOUCH_INT_L_1V8", |
| "UART_BT_WAKE_ODL", |
| "AP_GPIO23", |
| "AP_SPI_FLASH_CS_L", |
| "AP_SPI_FLASH_CLK", |
| "EN_PP3300_DPBRDG_DX", |
| "AP_SPI_FLASH_MOSI", |
| "AP_SPI_FLASH_MISO", |
| "I2S_HP_DATAOUT", |
| "AP_GPIO30", |
| "I2S_SPKR_MCLK", |
| "I2S_SPKR_BCLK", |
| "I2S_SPKR_LRCK", |
| "I2S_SPKR_DATAIN", |
| "I2S_SPKR_DATAOUT", |
| "AP_SPI_H1_TPM_CLK", |
| "AP_SPI_H1_TPM_CS_L", |
| "AP_SPI_H1_TPM_MISO", |
| "AP_SPI_H1_TPM_MOSI", |
| "BL_PWM", |
| "EDPBRDG_PWREN", |
| "EDPBRDG_RST_ODL", |
| "EN_PP3300_HUB", |
| "HUB_RST_L", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "SD_CLK", |
| "SD_CMD", |
| "SD_DATA3", |
| "SD_DATA0", |
| "SD_DATA2", |
| "SD_DATA1", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "PCIE_WAKE_ODL", |
| "PCIE_RST_L", |
| "PCIE_CLKREQ_ODL", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "SPMI_SCL", |
| "SPMI_SDA", |
| "AP_GOOD", |
| "UART_DBG_TX_AP_RX", |
| "UART_AP_TX_DBG_RX", |
| "UART_AP_TX_BT_RX", |
| "UART_BT_TX_AP_RX", |
| "MIPI_DPI_D0_R", |
| "MIPI_DPI_D1_R", |
| "MIPI_DPI_D2_R", |
| "MIPI_DPI_D3_R", |
| "MIPI_DPI_D4_R", |
| "MIPI_DPI_D5_R", |
| "MIPI_DPI_D6_R", |
| "MIPI_DPI_D7_R", |
| "MIPI_DPI_D8_R", |
| "MIPI_DPI_D9_R", |
| "MIPI_DPI_D10_R", |
| "", |
| "", |
| "MIPI_DPI_DE_R", |
| "MIPI_DPI_D11_R", |
| "MIPI_DPI_VSYNC_R", |
| "MIPI_DPI_CLK_R", |
| "MIPI_DPI_HSYNC_R", |
| "PCM_BT_DATAIN", |
| "PCM_BT_SYNC", |
| "PCM_BT_DATAOUT", |
| "PCM_BT_CLK", |
| "AP_I2C_AUDIO_SCL", |
| "AP_I2C_AUDIO_SDA", |
| "SCP_I2C_SCL", |
| "SCP_I2C_SDA", |
| "AP_I2C_WLAN_SCL", |
| "AP_I2C_WLAN_SDA", |
| "AP_I2C_DPBRDG_SCL", |
| "AP_I2C_DPBRDG_SDA", |
| "EN_PP1800_DPBRDG_DX", |
| "EN_PP3300_EDP_DX", |
| "EN_PP1800_EDPBRDG_DX", |
| "EN_PP1000_EDPBRDG", |
| "SCP_JTAG0_TDO", |
| "SCP_JTAG0_TDI", |
| "SCP_JTAG0_TMS", |
| "SCP_JTAG0_TCK", |
| "SCP_JTAG0_TRSTN", |
| "EN_PP3000_VMC_PMU", |
| "EN_PP3300_DISPLAY_DX", |
| "TOUCH_RST_L_1V8", |
| "TOUCH_REPORT_DISABLE", |
| "", |
| "", |
| "AP_I2C_TRACKPAD_SCL_1V8", |
| "AP_I2C_TRACKPAD_SDA_1V8", |
| "EN_PP3300_WLAN", |
| "BT_KILL_L", |
| "WIFI_KILL_L", |
| "SET_VMC_VOLT_AT_1V8", |
| "EN_SPK", |
| "AP_WARM_RST_REQ", |
| "", |
| "", |
| "EN_PP3000_SD_S3", |
| "AP_EDP_BKLTEN", |
| "", |
| "", |
| "", |
| "AP_SPI_EC_CLK", |
| "AP_SPI_EC_CS_L", |
| "AP_SPI_EC_MISO", |
| "AP_SPI_EC_MOSI", |
| "AP_I2C_EDPBRDG_SCL", |
| "AP_I2C_EDPBRDG_SDA", |
| "MT6315_PROC_INT", |
| "MT6315_GPU_INT", |
| "UART_SERVO_TX_SCP_RX", |
| "UART_SCP_TX_SERVO_RX", |
| "BT_RTS_AP_CTS", |
| "AP_RTS_BT_CTS", |
| "UART_AP_WAKE_BT_ODL", |
| "WLAN_ALERT_ODL", |
| "EC_IN_RW_ODL", |
| "H1_AP_INT_ODL", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "", |
| "MSDC0_CMD", |
| "MSDC0_DAT0", |
| "MSDC0_DAT2", |
| "MSDC0_DAT4", |
| "MSDC0_DAT6", |
| "MSDC0_DAT1", |
| "MSDC0_DAT5", |
| "MSDC0_DAT7", |
| "MSDC0_DSL", |
| "MSDC0_CLK", |
| "MSDC0_DAT3", |
| "MSDC0_RST_L", |
| "SCP_VREQ_VAO", |
| "AUD_DAT_MOSI2", |
| "AUD_NLE_MOSI1", |
| "AUD_NLE_MOSI0", |
| "AUD_DAT_MISO2", |
| "AP_I2C_SAR_SDA", |
| "AP_I2C_SAR_SCL", |
| "AP_I2C_PWR_SCL", |
| "AP_I2C_PWR_SDA", |
| "AP_I2C_TS_SCL_1V8", |
| "AP_I2C_TS_SDA_1V8", |
| "SRCLKENA0", |
| "SRCLKENA1", |
| "AP_EC_WATCHDOG_L", |
| "PWRAP_SPI0_MI", |
| "PWRAP_SPI0_CSN", |
| "PWRAP_SPI0_MO", |
| "PWRAP_SPI0_CK", |
| "AP_RTC_CLK32K", |
| "AUD_CLK_MOSI", |
| "AUD_SYNC_MOSI", |
| "AUD_DAT_MOSI0", |
| "AUD_DAT_MOSI1", |
| "AUD_DAT_MISO0", |
| "AUD_DAT_MISO1"; |
| |
| anx7625_dp_pins: anx7625-dp-pins { |
| pins1 { |
| pinmux = <PINMUX_GPIO8__FUNC_GPIO8>, |
| <PINMUX_GPIO9__FUNC_GPIO9>; |
| output-low; |
| }; |
| pins2 { |
| pinmux = <PINMUX_GPIO7__FUNC_GPIO7>; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| anx7625_pins: anx7625-pins { |
| pins1 { |
| pinmux = <PINMUX_GPIO41__FUNC_GPIO41>, |
| <PINMUX_GPIO42__FUNC_GPIO42>; |
| output-low; |
| }; |
| pins2 { |
| pinmux = <PINMUX_GPIO6__FUNC_GPIO6>; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| aud_clk_mosi_off: aud_clk_mosi_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO214__FUNC_GPIO214>, |
| <PINMUX_GPIO215__FUNC_GPIO215>; |
| }; |
| }; |
| |
| aud_clk_mosi_on: aud_clk_mosi_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO214__FUNC_AUD_CLK_MOSI>, |
| <PINMUX_GPIO215__FUNC_AUD_SYNC_MOSI>; |
| drive-strength = <MTK_DRIVE_4mA>; |
| }; |
| }; |
| |
| aud_dat_miso_ch34_off: aud_dat_miso_ch34_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO199__FUNC_GPIO199>; |
| }; |
| }; |
| |
| aud_dat_miso_ch34_on: aud_dat_miso_ch34_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>; |
| }; |
| }; |
| |
| aud_dat_miso_off: aud_dat_miso_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO218__FUNC_GPIO218>, |
| <PINMUX_GPIO219__FUNC_GPIO219>; |
| }; |
| }; |
| |
| aud_dat_miso_on: aud_dat_miso_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO218__FUNC_AUD_DAT_MISO0>, |
| <PINMUX_GPIO219__FUNC_AUD_DAT_MISO1>; |
| drive-strength = <MTK_DRIVE_4mA>; |
| }; |
| }; |
| |
| aud_dat_miso2_off: aud_dat_miso2_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO199__FUNC_GPIO199>; |
| }; |
| }; |
| |
| aud_dat_miso2_on: aud_dat_miso2_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>; |
| }; |
| }; |
| |
| aud_dat_mosi_ch34_off: aud_dat_mosi_ch34_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO196__FUNC_GPIO196>; |
| }; |
| }; |
| |
| aud_dat_mosi_ch34_on: aud_dat_mosi_ch34_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2>; |
| }; |
| }; |
| |
| aud_dat_mosi_off: aud_dat_mosi_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO216__FUNC_GPIO216>, |
| <PINMUX_GPIO217__FUNC_GPIO217>; |
| }; |
| }; |
| |
| aud_dat_mosi_on: aud_dat_mosi_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0>, |
| <PINMUX_GPIO217__FUNC_AUD_DAT_MOSI1>; |
| drive-strength = <MTK_DRIVE_4mA>; |
| }; |
| }; |
| |
| aud_gpio_i2s0_off: aud_gpio_i2s0_off { |
| }; |
| |
| aud_gpio_i2s0_on: aud_gpio_i2s0_on { |
| }; |
| |
| aud_gpio_i2s1_off: aud_gpio_i2s1_off { |
| }; |
| |
| aud_gpio_i2s1_on: aud_gpio_i2s1_on { |
| }; |
| |
| aud_gpio_i2s2_off: aud_gpio_i2s2_off { |
| }; |
| |
| aud_gpio_i2s2_on: aud_gpio_i2s2_on { |
| }; |
| |
| aud_gpio_i2s3_off: aud_gpio_i2s3_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO32__FUNC_GPIO32>, |
| <PINMUX_GPIO33__FUNC_GPIO33>, |
| <PINMUX_GPIO35__FUNC_GPIO35>; |
| }; |
| }; |
| |
| aud_gpio_i2s3_on: aud_gpio_i2s3_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO32__FUNC_I2S3_BCK>, |
| <PINMUX_GPIO33__FUNC_I2S3_LRCK>, |
| <PINMUX_GPIO35__FUNC_I2S3_DO>; |
| }; |
| }; |
| |
| aud_gpio_i2s5_off: aud_gpio_i2s5_off { |
| }; |
| |
| aud_gpio_i2s5_on: aud_gpio_i2s5_on { |
| }; |
| |
| aud_gpio_i2s6_off: aud_gpio_i2s6_off { |
| }; |
| |
| aud_gpio_i2s6_on: aud_gpio_i2s6_on { |
| }; |
| |
| aud_gpio_i2s7_off: aud_gpio_i2s7_off { |
| }; |
| |
| aud_gpio_i2s7_on: aud_gpio_i2s7_on { |
| }; |
| |
| aud_gpio_i2s8_off: aud_gpio_i2s8_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO10__FUNC_GPIO10>, |
| <PINMUX_GPIO11__FUNC_GPIO11>, |
| <PINMUX_GPIO12__FUNC_GPIO12>, |
| <PINMUX_GPIO13__FUNC_GPIO13>; |
| }; |
| }; |
| |
| aud_gpio_i2s8_on: aud_gpio_i2s8_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO10__FUNC_I2S8_MCK>, |
| <PINMUX_GPIO11__FUNC_I2S8_BCK>, |
| <PINMUX_GPIO12__FUNC_I2S8_LRCK>, |
| <PINMUX_GPIO13__FUNC_I2S8_DI>; |
| }; |
| }; |
| |
| aud_gpio_i2s9_off: aud_gpio_i2s9_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO29__FUNC_GPIO29>; |
| }; |
| }; |
| |
| aud_gpio_i2s9_on: aud_gpio_i2s9_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO29__FUNC_I2S9_DO>; |
| }; |
| }; |
| |
| aud_gpio_tdm_off: aud_gpio_tdm_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO0__FUNC_GPIO0>, |
| <PINMUX_GPIO1__FUNC_GPIO1>, |
| <PINMUX_GPIO2__FUNC_GPIO2>, |
| <PINMUX_GPIO3__FUNC_GPIO3>; |
| }; |
| }; |
| |
| aud_gpio_tdm_on: aud_gpio_tdm_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO0__FUNC_TDM_LRCK>, |
| <PINMUX_GPIO1__FUNC_TDM_BCK>, |
| <PINMUX_GPIO2__FUNC_TDM_MCK>, |
| <PINMUX_GPIO3__FUNC_TDM_DATA0>; |
| }; |
| }; |
| |
| aud_nle_mosi_off: aud_nle_mosi_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO197__FUNC_GPIO197>, |
| <PINMUX_GPIO198__FUNC_GPIO198>; |
| }; |
| }; |
| |
| aud_nle_mosi_on: aud_nle_mosi_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1>, |
| <PINMUX_GPIO198__FUNC_AUD_NLE_MOSI0>; |
| }; |
| }; |
| |
| bt_pins: bt-pins { |
| bt_kill: bt_kill { |
| pinmux = <PINMUX_GPIO144__FUNC_GPIO144>; /* BT_KILL_L */ |
| output-low; |
| }; |
| bt_wake: bt_wake { |
| pinmux = <PINMUX_GPIO22__FUNC_GPIO22>; /* bt to wake ap */ |
| bias-pull-up; |
| }; |
| ap_wake_bt: ap_wake_bt { |
| pinmux = <PINMUX_GPIO168__FUNC_GPIO168>; /* AP_WAKE_BT_H */ |
| output-low; |
| }; |
| }; |
| |
| dpi_pin_default: dpi_pin_default { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO96__FUNC_GPIO96>, |
| <PINMUX_GPIO97__FUNC_GPIO97>, |
| <PINMUX_GPIO98__FUNC_GPIO98>, |
| <PINMUX_GPIO99__FUNC_GPIO99>, |
| <PINMUX_GPIO100__FUNC_GPIO100>, |
| <PINMUX_GPIO101__FUNC_GPIO101>, |
| <PINMUX_GPIO102__FUNC_GPIO102>, |
| <PINMUX_GPIO103__FUNC_GPIO103>, |
| <PINMUX_GPIO104__FUNC_GPIO104>, |
| <PINMUX_GPIO105__FUNC_GPIO105>, |
| <PINMUX_GPIO106__FUNC_GPIO106>, |
| <PINMUX_GPIO110__FUNC_GPIO110>, |
| <PINMUX_GPIO113__FUNC_GPIO113>, |
| <PINMUX_GPIO111__FUNC_GPIO111>, |
| <PINMUX_GPIO109__FUNC_GPIO109>, |
| <PINMUX_GPIO112__FUNC_GPIO112>; |
| drive-strength = <MTK_DRIVE_6mA>; |
| output-low; |
| }; |
| }; |
| |
| dpi_pin_func: dpi_pin_func { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO96__FUNC_DPI_D0>, |
| <PINMUX_GPIO97__FUNC_DPI_D1>, |
| <PINMUX_GPIO98__FUNC_DPI_D2>, |
| <PINMUX_GPIO99__FUNC_DPI_D3>, |
| <PINMUX_GPIO100__FUNC_DPI_D4>, |
| <PINMUX_GPIO101__FUNC_DPI_D5>, |
| <PINMUX_GPIO102__FUNC_DPI_D6>, |
| <PINMUX_GPIO103__FUNC_DPI_D7>, |
| <PINMUX_GPIO104__FUNC_DPI_D8>, |
| <PINMUX_GPIO105__FUNC_DPI_D9>, |
| <PINMUX_GPIO106__FUNC_DPI_D10>, |
| <PINMUX_GPIO110__FUNC_DPI_D11>, |
| <PINMUX_GPIO113__FUNC_DPI_HSYNC>, |
| <PINMUX_GPIO111__FUNC_DPI_VSYNC>, |
| <PINMUX_GPIO109__FUNC_DPI_DE>, |
| <PINMUX_GPIO112__FUNC_DPI_CK>; |
| drive-strength = <MTK_DRIVE_6mA>; |
| }; |
| }; |
| |
| ec_ap_int_odl: ec_ap_int_odl { |
| pins1 { |
| pinmux = <PINMUX_GPIO5__FUNC_GPIO5>; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| h1_int_od_l: h1_int_od_l { |
| pins1 { |
| pinmux = <PINMUX_GPIO171__FUNC_GPIO171>; |
| input-enable; |
| }; |
| }; |
| |
| i2c0_pins: i2c0 { |
| pins_bus { |
| pinmux = <PINMUX_GPIO204__FUNC_SCL0>, |
| <PINMUX_GPIO205__FUNC_SDA0>; |
| bias-pull-up; |
| mediatek,pull-up-adv = <3>; |
| mediatek,drive-strength-adv = <0>; |
| drive-strength = <1>; |
| }; |
| }; |
| |
| i2c1_pins: i2c1 { |
| pins_bus { |
| pinmux = <PINMUX_GPIO118__FUNC_SCL1>, |
| <PINMUX_GPIO119__FUNC_SDA1>; |
| bias-pull-up; |
| mediatek,pull-up-adv = <3>; |
| mediatek,drive-strength-adv = <7>; |
| }; |
| }; |
| |
| i2c2_pins: i2c2 { |
| pins_bus { |
| pinmux = <PINMUX_GPIO141__FUNC_SCL2>, |
| <PINMUX_GPIO142__FUNC_SDA2>; |
| bias-pull-up; |
| mediatek,pull-up-adv = <3>; |
| mediatek,drive-strength-adv = <0>; |
| }; |
| }; |
| |
| i2c3_pins: i2c3 { |
| pins_bus { |
| pinmux = <PINMUX_GPIO160__FUNC_SCL3>, |
| <PINMUX_GPIO161__FUNC_SDA3>; |
| bias-disable; |
| mediatek,drive-strength-adv = <7>; |
| }; |
| }; |
| |
| i2c6_pins: i2c6 { |
| pins_bus { |
| pinmux = <PINMUX_GPIO200__FUNC_SCL6>, |
| <PINMUX_GPIO201__FUNC_SDA6>; |
| bias-pull-up; |
| mediatek,pull-up-adv = <3>; |
| mediatek,drive-strength-adv = <7>; |
| }; |
| }; |
| |
| i2c7_pins: i2c7 { |
| pins_bus { |
| pinmux = <PINMUX_GPIO124__FUNC_SCL7>, |
| <PINMUX_GPIO125__FUNC_SDA7>; |
| bias-disable; |
| mediatek,drive-strength-adv = <7>; |
| }; |
| }; |
| |
| mmc0_pins_default: mmc0default { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>, |
| <PINMUX_GPIO188__FUNC_MSDC0_DAT1>, |
| <PINMUX_GPIO185__FUNC_MSDC0_DAT2>, |
| <PINMUX_GPIO193__FUNC_MSDC0_DAT3>, |
| <PINMUX_GPIO186__FUNC_MSDC0_DAT4>, |
| <PINMUX_GPIO189__FUNC_MSDC0_DAT5>, |
| <PINMUX_GPIO187__FUNC_MSDC0_DAT6>, |
| <PINMUX_GPIO190__FUNC_MSDC0_DAT7>, |
| <PINMUX_GPIO183__FUNC_MSDC0_CMD>; |
| input-enable; |
| drive-strength = <3>; |
| mediatek,pull-up-adv = <1>; |
| }; |
| |
| pins_clk { |
| pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>; |
| drive-strength = <3>; |
| mediatek,pull-down-adv = <2>; |
| }; |
| |
| pins_rst { |
| pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>; |
| drive-strength = <3>; |
| mediatek,pull-down-adv = <1>; |
| }; |
| }; |
| |
| mmc0_pins_uhs: mmc0uhs{ |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>, |
| <PINMUX_GPIO188__FUNC_MSDC0_DAT1>, |
| <PINMUX_GPIO185__FUNC_MSDC0_DAT2>, |
| <PINMUX_GPIO193__FUNC_MSDC0_DAT3>, |
| <PINMUX_GPIO186__FUNC_MSDC0_DAT4>, |
| <PINMUX_GPIO189__FUNC_MSDC0_DAT5>, |
| <PINMUX_GPIO187__FUNC_MSDC0_DAT6>, |
| <PINMUX_GPIO190__FUNC_MSDC0_DAT7>, |
| <PINMUX_GPIO183__FUNC_MSDC0_CMD>; |
| input-enable; |
| drive-strength = <4>; |
| mediatek,pull-up-adv = <1>; |
| }; |
| |
| pins_clk { |
| pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>; |
| drive-strength = <4>; |
| mediatek,pull-down-adv = <2>; |
| }; |
| |
| pins_rst { |
| pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>; |
| drive-strength = <3>; |
| mediatek,pull-down-adv = <1>; |
| }; |
| |
| pins_ds { |
| pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>; |
| drive-strength = <4>; |
| mediatek,pull-down-adv = <2>; |
| }; |
| }; |
| |
| mmc1_pins_default: mmc1default { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>, |
| <PINMUX_GPIO56__FUNC_MSDC1_DAT1>, |
| <PINMUX_GPIO55__FUNC_MSDC1_DAT2>, |
| <PINMUX_GPIO53__FUNC_MSDC1_DAT3>, |
| <PINMUX_GPIO52__FUNC_MSDC1_CMD>; |
| input-enable; |
| drive-strength = <3>; |
| mediatek,pull-up-adv = <1>; |
| }; |
| |
| pins_clk { |
| pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>; |
| drive-strength = <3>; |
| mediatek,pull-down-adv = <2>; |
| }; |
| |
| pins_insert { |
| pinmux = <PINMUX_GPIO17__FUNC_GPIO17>; |
| input-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| mmc1_pins_uhs: mmc1@0 { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>, |
| <PINMUX_GPIO56__FUNC_MSDC1_DAT1>, |
| <PINMUX_GPIO55__FUNC_MSDC1_DAT2>, |
| <PINMUX_GPIO53__FUNC_MSDC1_DAT3>, |
| <PINMUX_GPIO52__FUNC_MSDC1_CMD>; |
| input-enable; |
| drive-strength = <3>; |
| mediatek,pull-up-adv = <1>; |
| }; |
| |
| pins_clk { |
| pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>; |
| drive-strength = <3>; |
| mediatek,pull-down-adv = <2>; |
| input-enable; |
| }; |
| }; |
| |
| nor_gpio1_pins: nor { |
| pins1 { |
| pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>, |
| <PINMUX_GPIO28__FUNC_SPINOR_IO1>; |
| input-enable; |
| drive-strength = <MTK_DRIVE_4mA>; |
| bias-pull-up; |
| }; |
| |
| pins2 { |
| pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>; |
| drive-strength = <MTK_DRIVE_4mA>; |
| bias-pull-up; |
| }; |
| |
| pins_clk { |
| pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>; |
| input-enable; |
| drive-strength = <MTK_DRIVE_4mA>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie_pinmux: pcie_pinmux { |
| pcie_wake { |
| pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>; |
| bias-pull-up; |
| }; |
| pcie_pereset { |
| pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>; |
| }; |
| pcie_clkreq { |
| pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>; |
| bias-pull-up; |
| }; |
| pcie_en_pp3300_wlan: pcie_en_pp3300_wlan { |
| /* TODO: Model as a regulator */ |
| pinmux = <PINMUX_GPIO143__FUNC_GPIO143>; |
| output-high; |
| }; |
| /* TODO: Split and implement. */ |
| wifi_kill: wifi_kill { |
| pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */ |
| output-high; |
| }; |
| }; |
| |
| pp1000_dpbrdg_en: pp1000-dpbrdg-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO19__FUNC_GPIO19>; |
| output-low; |
| }; |
| }; |
| |
| pp1000_mipibrdg_en: pp1000-mipibrdg-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO129__FUNC_GPIO129>; |
| output-low; |
| }; |
| }; |
| |
| pp1800_dpbrdg_en: pp1800-dpbrdg-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO126__FUNC_GPIO126>; |
| output-low; |
| }; |
| }; |
| |
| pp1800_mipibrdg_en: pp1800-mipibrd-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO128__FUNC_GPIO128>; |
| output-low; |
| }; |
| }; |
| |
| pp3300_dpbrdg_en: pp3300-dpbrdg-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO26__FUNC_GPIO26>; |
| output-low; |
| }; |
| }; |
| |
| pp3300_mipibrdg_en: pp3300-mipibrdg-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO127__FUNC_GPIO127>; |
| output-low; |
| }; |
| }; |
| |
| pp3300_panel_pins: pp3300-panel-pins { |
| panel_3v3_enable: panel-3v3-enable { |
| pinmux = <PINMUX_GPIO136__FUNC_GPIO136>; |
| output-low; |
| }; |
| }; |
| |
| ppvarn_lcd_en: ppvarn-lcd-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO166__FUNC_GPIO166>; |
| output-low; |
| }; |
| }; |
| |
| ppvarp_lcd_en: ppvarp-lcd-en { |
| pins1 { |
| pinmux = <PINMUX_GPIO66__FUNC_GPIO66>; |
| output-low; |
| }; |
| }; |
| |
| pwm0_pin_default: pwm0_pin_default { |
| pins_pwm { |
| pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>; |
| }; |
| pins_inhibit { |
| pinmux = <PINMUX_GPIO152__FUNC_GPIO152>; |
| output-high; |
| }; |
| }; |
| |
| scp_pins: scp { |
| pins_scp_vreq { |
| pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>; |
| }; |
| }; |
| |
| spi_pins_1: spi1@0 { |
| pins_spi{ |
| pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>, |
| <PINMUX_GPIO159__FUNC_SPI1_A_MO>, |
| <PINMUX_GPIO156__FUNC_SPI1_A_CLK>; |
| bias-disable; |
| }; |
| pins_spi_mi { |
| pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>; |
| bias-pull-down; |
| }; |
| }; |
| |
| spi_pins_5: spi5@0 { |
| pins_spi{ |
| pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>, |
| <PINMUX_GPIO37__FUNC_GPIO37>, |
| <PINMUX_GPIO39__FUNC_SPI5_A_MO>, |
| <PINMUX_GPIO36__FUNC_SPI5_A_CLK>; |
| bias-disable; |
| }; |
| }; |
| |
| touchpad_pins: touchpad-pins { |
| touchpad_int { |
| pinmux = <PINMUX_GPIO15__FUNC_GPIO15>; |
| input-enable; |
| mediatek,pull-up-adv = <3>; |
| }; |
| }; |
| |
| touchscreen_pins: touchscreen-pins { |
| pin_irq { |
| pinmux = <PINMUX_GPIO21__FUNC_GPIO21>; |
| input-enable; |
| bias-pull-up; |
| }; |
| touch_pin_reset: pin_reset { |
| pinmux = <PINMUX_GPIO137__FUNC_GPIO137>; |
| output-high; |
| }; |
| touch_pin_report_sw: pin_report_sw { |
| pinmux = <PINMUX_GPIO138__FUNC_GPIO138>; |
| output-low; |
| }; |
| }; |
| |
| uart1_pins: uart1-pins { |
| pins_rx { |
| pinmux = <PINMUX_GPIO94__FUNC_URXD1>; |
| input-enable; |
| bias-pull-up; |
| }; |
| pins_tx { |
| pinmux = <PINMUX_GPIO95__FUNC_UTXD1>; |
| }; |
| pins_cts { |
| pinmux = <PINMUX_GPIO166__FUNC_UCTS1>; |
| input-enable; |
| }; |
| pins_rts { |
| pinmux = <PINMUX_GPIO167__FUNC_URTS1>; |
| output-enable; |
| }; |
| }; |
| |
| uart1_pins_sleep: uart1-pins-sleep { |
| pins_rx { |
| pinmux = <PINMUX_GPIO94__FUNC_GPIO94>; |
| input-enable; |
| bias-pull-up; |
| }; |
| pins_tx { |
| pinmux = <PINMUX_GPIO95__FUNC_UTXD1>; |
| }; |
| pins_cts { |
| pinmux = <PINMUX_GPIO166__FUNC_UCTS1>; |
| input-enable; |
| }; |
| pins_rts { |
| pinmux = <PINMUX_GPIO167__FUNC_URTS1>; |
| output-enable; |
| }; |
| }; |
| |
| vow_clk_miso_off: vow_clk_miso_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO219__FUNC_GPIO219>; |
| }; |
| }; |
| |
| vow_clk_miso_on: vow_clk_miso_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO219__FUNC_VOW_CLK_MISO>; |
| }; |
| }; |
| |
| vow_dat_miso_off: vow_dat_miso_off { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO218__FUNC_GPIO218>; |
| }; |
| }; |
| |
| vow_dat_miso_on: vow_dat_miso_on { |
| pins_cmd_dat { |
| pinmux = <PINMUX_GPIO218__FUNC_VOW_DAT_MISO>; |
| }; |
| }; |
| }; |
| |
| &pmic { |
| interrupt-parent = <&pio>; |
| interrupts = <214 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &pwm0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm0_pin_default>; |
| }; |
| |
| &scp { |
| memory-region = <&scp_mem_reserved>; |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&scp_pins>; |
| |
| cros_ec { |
| compatible = "google,cros-ec-rpmsg"; |
| mtk,rpmsg-name = "cros-ec-rpmsg"; |
| }; |
| }; |
| |
| &spi1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_1>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| |
| cros_ec: ec@0 { |
| compatible = "google,cros-ec-spi"; |
| reg = <0>; |
| spi-max-frequency = <3000000>; |
| interrupt-parent = <&pio>; |
| interrupts = <5 IRQ_TYPE_LEVEL_LOW>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ec_ap_int_odl>; |
| |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| i2c_tunnel: i2c-tunnel { |
| compatible = "google,cros-ec-i2c-tunnel"; |
| google,remote-bus = <0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| base_detection: cbas { |
| compatible = "google,cros-cbas"; |
| }; |
| |
| mt6360_ldo3_reg: regulator@0 { |
| compatible = "google,cros-ec-regulator"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| reg = <0>; |
| }; |
| |
| mt6360_ldo5_reg: regulator@1 { |
| compatible = "google,cros-ec-regulator"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| reg = <1>; |
| }; |
| |
| typec { |
| compatible = "google,cros-ec-typec"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| usb_c0: connector@0 { |
| compatible = "usb-c-connector"; |
| reg = <0>; |
| label = "left"; |
| power-role = "dual"; |
| data-role = "host"; |
| try-power-role = "source"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@1 { |
| reg = <1>; |
| |
| typec_port0: endpoint { |
| remote-endpoint = <&anx_typec0>; |
| }; |
| }; |
| }; |
| }; |
| |
| usb_c1: connector@1 { |
| compatible = "usb-c-connector"; |
| reg = <1>; |
| label = "right"; |
| power-role = "dual"; |
| data-role = "host"; |
| try-power-role = "source"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@1 { |
| reg = <1>; |
| |
| typec_port1: endpoint { |
| remote-endpoint = <&anx_typec1>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &spi5 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_5>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>; |
| |
| cr50@0 { |
| compatible = "google,cr50"; |
| reg = <0>; |
| spi-max-frequency = <1000000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&h1_int_od_l>; |
| interrupt-parent = <&pio>; |
| interrupts = <171 IRQ_TYPE_EDGE_RISING>; |
| }; |
| }; |
| |
| &spmi { |
| grpid = <11>; |
| mt6315_6: pmic@6 { |
| compatible = "mediatek,mt6315-regulator"; |
| reg = <0x6 0>; |
| |
| regulators { |
| mt6315_6_vbuck1: vbuck1 { |
| regulator-compatible = "vbuck1"; |
| regulator-name = "Vbcpu"; |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1193750>; |
| regulator-enable-ramp-delay = <256>; |
| regulator-allowed-modes = <0 1 2 4>; |
| regulator-always-on; |
| }; |
| |
| mt6315_6_vbuck3: vbuck3 { |
| regulator-compatible = "vbuck3"; |
| regulator-name = "Vlcpu"; |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1193750>; |
| regulator-enable-ramp-delay = <256>; |
| regulator-allowed-modes = <0 1 2 4>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| mt6315_7: pmic@7 { |
| compatible = "mediatek,mt6315-regulator"; |
| reg = <0x7 0>; |
| |
| regulators { |
| mt6315_7_vbuck1: vbuck1 { |
| regulator-compatible = "vbuck1"; |
| regulator-name = "Vgpu"; |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1193750>; |
| regulator-enable-ramp-delay = <256>; |
| regulator-allowed-modes = <0 1 2 4>; |
| }; |
| }; |
| }; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&uart1_pins>; |
| pinctrl-1 = <&uart1_pins_sleep>; |
| interrupts-extended = <&gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>, |
| <&pio 94 IRQ_TYPE_EDGE_FALLING>; |
| |
| bluetooth: bluetooth { |
| compatible = "realtek,rtl8822cs-bt"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&bt_pins>; |
| |
| enable-gpios = <&pio 144 GPIO_ACTIVE_HIGH>; |
| device-wake-gpios = <&pio 168 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| &xhci { |
| vusb33-supply = <&pp3300_g>; |
| vbus-supply = <&pp5000_a>; |
| wakeup-source; |
| status = "okay"; |
| }; |
| |
| #include <arm/cros-ec-keyboard.dtsi> |
| #include <arm/cros-ec-sbs.dtsi> |
| |
| &cros_ec { |
| cros_ec_pwm: ec-pwm { |
| compatible = "google,cros-ec-pwm"; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| }; |
