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Jerome Anand5dab11d2017-01-25 04:27:52 +05301/*
2 * intel_hdmi_audio.c - Intel HDMI audio driver
3 *
4 * Copyright (C) 2016 Intel Corp
5 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
6 * Ramesh Babu K V <ramesh.babu@intel.com>
7 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
8 * Jerome Anand <jerome.anand@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 * ALSA driver for Intel HDMI audio
22 */
23
Jerome Anand5dab11d2017-01-25 04:27:52 +053024#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/module.h>
Takashi Iwaida864802017-01-31 13:52:22 +010028#include <linux/interrupt.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053029#include <linux/acpi.h>
30#include <asm/cacheflush.h>
31#include <sound/pcm.h>
32#include <sound/core.h>
33#include <sound/pcm_params.h>
34#include <sound/initval.h>
35#include <sound/control.h>
36#include <sound/initval.h>
Takashi Iwaida864802017-01-31 13:52:22 +010037#include <drm/intel_lpe_audio.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053038#include "intel_hdmi_audio.h"
39
Jerome Anand5dab11d2017-01-25 04:27:52 +053040/*standard module options for ALSA. This module supports only one card*/
41static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
42static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
Jerome Anand5dab11d2017-01-25 04:27:52 +053043
44module_param_named(index, hdmi_card_index, int, 0444);
45MODULE_PARM_DESC(index,
46 "Index value for INTEL Intel HDMI Audio controller.");
47module_param_named(id, hdmi_card_id, charp, 0444);
48MODULE_PARM_DESC(id,
49 "ID string for INTEL Intel HDMI Audio controller.");
50
51/*
52 * ELD SA bits in the CEA Speaker Allocation data block
53 */
Takashi Iwai4a5ddb22017-02-01 16:45:38 +010054static const int eld_speaker_allocation_bits[] = {
Jerome Anand5dab11d2017-01-25 04:27:52 +053055 [0] = FL | FR,
56 [1] = LFE,
57 [2] = FC,
58 [3] = RL | RR,
59 [4] = RC,
60 [5] = FLC | FRC,
61 [6] = RLC | RRC,
62 /* the following are not defined in ELD yet */
63 [7] = 0,
64};
65
66/*
67 * This is an ordered list!
68 *
69 * The preceding ones have better chances to be selected by
70 * hdmi_channel_allocation().
71 */
72static struct cea_channel_speaker_allocation channel_allocations[] = {
73/* channel: 7 6 5 4 3 2 1 0 */
74{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
75 /* 2.1 */
76{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
77 /* Dolby Surround */
78{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
79 /* surround40 */
80{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
81 /* surround41 */
82{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
83 /* surround50 */
84{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
85 /* surround51 */
86{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
87 /* 6.1 */
88{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
89 /* surround71 */
90{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
91
92{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
93{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
94{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
95{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
96{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
97{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
98{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
99{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
100{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
101{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
102{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
103{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
104{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
105{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
106{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
107{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
108{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
109{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
110{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
111{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
112{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
113{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
114{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
115};
116
Takashi Iwai4a5ddb22017-02-01 16:45:38 +0100117static const struct channel_map_table map_tables[] = {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530118 { SNDRV_CHMAP_FL, 0x00, FL },
119 { SNDRV_CHMAP_FR, 0x01, FR },
120 { SNDRV_CHMAP_RL, 0x04, RL },
121 { SNDRV_CHMAP_RR, 0x05, RR },
122 { SNDRV_CHMAP_LFE, 0x02, LFE },
123 { SNDRV_CHMAP_FC, 0x03, FC },
124 { SNDRV_CHMAP_RLC, 0x06, RLC },
125 { SNDRV_CHMAP_RRC, 0x07, RRC },
126 {} /* terminator */
127};
128
129/* hardware capability structure */
130static const struct snd_pcm_hardware snd_intel_hadstream = {
131 .info = (SNDRV_PCM_INFO_INTERLEAVED |
132 SNDRV_PCM_INFO_DOUBLE |
133 SNDRV_PCM_INFO_MMAP|
134 SNDRV_PCM_INFO_MMAP_VALID |
135 SNDRV_PCM_INFO_BATCH),
136 .formats = (SNDRV_PCM_FMTBIT_S24 |
137 SNDRV_PCM_FMTBIT_U24),
138 .rates = SNDRV_PCM_RATE_32000 |
139 SNDRV_PCM_RATE_44100 |
140 SNDRV_PCM_RATE_48000 |
141 SNDRV_PCM_RATE_88200 |
142 SNDRV_PCM_RATE_96000 |
143 SNDRV_PCM_RATE_176400 |
144 SNDRV_PCM_RATE_192000,
145 .rate_min = HAD_MIN_RATE,
146 .rate_max = HAD_MAX_RATE,
147 .channels_min = HAD_MIN_CHANNEL,
148 .channels_max = HAD_MAX_CHANNEL,
149 .buffer_bytes_max = HAD_MAX_BUFFER,
150 .period_bytes_min = HAD_MIN_PERIOD_BYTES,
151 .period_bytes_max = HAD_MAX_PERIOD_BYTES,
152 .periods_min = HAD_MIN_PERIODS,
153 .periods_max = HAD_MAX_PERIODS,
154 .fifo_size = HAD_FIFO_SIZE,
155};
156
157/* Register access functions */
Takashi Iwaida864802017-01-31 13:52:22 +0100158static inline void
159mid_hdmi_audio_read(struct snd_intelhad *ctx, u32 reg, u32 *val)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530160{
Takashi Iwaida864802017-01-31 13:52:22 +0100161 *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530162}
163
Takashi Iwaida864802017-01-31 13:52:22 +0100164static inline void
165mid_hdmi_audio_write(struct snd_intelhad *ctx, u32 reg, u32 val)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530166{
Takashi Iwaida864802017-01-31 13:52:22 +0100167 iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530168}
169
Takashi Iwai372d8552017-01-31 13:57:58 +0100170static int had_read_register(struct snd_intelhad *intelhaddata,
171 u32 offset, u32 *data)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530172{
Takashi Iwai79f439e2017-01-31 16:46:44 +0100173 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
174 return -ENODEV;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530175
Takashi Iwaida864802017-01-31 13:52:22 +0100176 mid_hdmi_audio_read(intelhaddata, offset, data);
177 return 0;
178}
179
180static void fixup_dp_config(struct snd_intelhad *intelhaddata,
181 u32 offset, u32 *data)
182{
183 if (intelhaddata->dp_output) {
184 if (offset == AUD_CONFIG && (*data & AUD_CONFIG_VALID_BIT))
185 *data |= AUD_CONFIG_DP_MODE | AUD_CONFIG_BLOCK_BIT;
186 }
Jerome Anand5dab11d2017-01-25 04:27:52 +0530187}
188
Takashi Iwai372d8552017-01-31 13:57:58 +0100189static int had_write_register(struct snd_intelhad *intelhaddata,
190 u32 offset, u32 data)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530191{
Takashi Iwai79f439e2017-01-31 16:46:44 +0100192 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
193 return -ENODEV;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530194
Takashi Iwaida864802017-01-31 13:52:22 +0100195 fixup_dp_config(intelhaddata, offset, &data);
196 mid_hdmi_audio_write(intelhaddata, offset, data);
197 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530198}
199
Takashi Iwai372d8552017-01-31 13:57:58 +0100200static int had_read_modify(struct snd_intelhad *intelhaddata, u32 offset,
201 u32 data, u32 mask)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530202{
Takashi Iwaida864802017-01-31 13:52:22 +0100203 u32 val_tmp;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530204
Takashi Iwai79f439e2017-01-31 16:46:44 +0100205 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
206 return -ENODEV;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530207
Takashi Iwaida864802017-01-31 13:52:22 +0100208 mid_hdmi_audio_read(intelhaddata, offset, &val_tmp);
209 val_tmp &= ~mask;
210 val_tmp |= (data & mask);
211
212 fixup_dp_config(intelhaddata, offset, &val_tmp);
213 mid_hdmi_audio_write(intelhaddata, offset, val_tmp);
214 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530215}
Takashi Iwaida864802017-01-31 13:52:22 +0100216
217/*
218 * function to read-modify AUD_CONFIG register on VLV2.
219 * The had_read_modify() function should not directly be used on VLV2 for
220 * updating AUD_CONFIG register.
Jerome Anand5dab11d2017-01-25 04:27:52 +0530221 * This is because:
222 * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
223 * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
224 * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
225 * register. This field should be 1xy binary for configuration with 6 or
226 * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
227 * causes the "channels" field to be updated as 0xy binary resulting in
228 * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
229 * appropriate value when doing read-modify of AUD_CONFIG register.
230 *
231 * @substream: the current substream or NULL if no active substream
232 * @data : data to be written
233 * @mask : mask
234 *
235 */
Takashi Iwaida864802017-01-31 13:52:22 +0100236static int had_read_modify_aud_config_v2(struct snd_intelhad *intelhaddata,
Jerome Anand5dab11d2017-01-25 04:27:52 +0530237 u32 data, u32 mask)
238{
Takashi Iwaida864802017-01-31 13:52:22 +0100239 struct snd_pcm_substream *substream;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530240 union aud_cfg cfg_val = {.cfg_regval = 0};
241 u8 channels;
242
243 /*
244 * If substream is NULL, there is no active stream.
245 * In this case just set channels to 2
246 */
Takashi Iwaida864802017-01-31 13:52:22 +0100247 substream = intelhaddata->stream_info.had_substream;
248 if (substream && substream->runtime)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530249 channels = substream->runtime->channels;
250 else
251 channels = 2;
Takashi Iwai4151ee82017-01-31 18:14:15 +0100252 cfg_val.cfg_regx.num_ch = channels - 2;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530253
254 data = data | cfg_val.cfg_regval;
Takashi Iwai4151ee82017-01-31 18:14:15 +0100255 mask = mask | AUD_CONFIG_CH_MASK;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530256
Takashi Iwaic75b0472017-01-31 15:49:15 +0100257 dev_dbg(intelhaddata->dev, "%s : data = %x, mask =%x\n",
258 __func__, data, mask);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530259
Takashi Iwai79dda752017-01-30 17:23:39 +0100260 return had_read_modify(intelhaddata, AUD_CONFIG, data, mask);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530261}
262
Takashi Iwai372d8552017-01-31 13:57:58 +0100263static void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530264{
Takashi Iwaida864802017-01-31 13:52:22 +0100265 u32 status_reg;
266
267 if (enable) {
Takashi Iwai4151ee82017-01-31 18:14:15 +0100268 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS, &status_reg);
Takashi Iwaida864802017-01-31 13:52:22 +0100269 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
Takashi Iwai4151ee82017-01-31 18:14:15 +0100270 mid_hdmi_audio_write(ctx, AUD_HDMI_STATUS, status_reg);
271 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS, &status_reg);
Takashi Iwaida864802017-01-31 13:52:22 +0100272 }
273}
274
Takashi Iwai372d8552017-01-31 13:57:58 +0100275static void snd_intelhad_enable_audio(struct snd_intelhad *intelhaddata,
276 bool enable)
Takashi Iwaida864802017-01-31 13:52:22 +0100277{
278 had_read_modify_aud_config_v2(intelhaddata, enable ? BIT(0) : 0,
279 BIT(0));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530280}
281
Takashi Iwai79dda752017-01-30 17:23:39 +0100282static void snd_intelhad_reset_audio(struct snd_intelhad *intelhaddata,
283 u8 reset)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530284{
Takashi Iwai4151ee82017-01-31 18:14:15 +0100285 had_write_register(intelhaddata, AUD_HDMI_STATUS, reset);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530286}
287
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100288/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530289 * initialize audio channel status registers
290 * This function is called in the prepare callback
291 */
292static int had_prog_status_reg(struct snd_pcm_substream *substream,
293 struct snd_intelhad *intelhaddata)
294{
295 union aud_cfg cfg_val = {.cfg_regval = 0};
296 union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
297 union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
298 int format;
299
Jerome Anand5dab11d2017-01-25 04:27:52 +0530300 ch_stat0.status_0_regx.lpcm_id = (intelhaddata->aes_bits &
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100301 IEC958_AES0_NONAUDIO) >> 1;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530302 ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100303 IEC958_AES3_CON_CLOCK) >> 4;
Takashi Iwai4151ee82017-01-31 18:14:15 +0100304 cfg_val.cfg_regx.val_bit = ch_stat0.status_0_regx.lpcm_id;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530305
306 switch (substream->runtime->rate) {
307 case AUD_SAMPLE_RATE_32:
308 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ;
309 break;
310
311 case AUD_SAMPLE_RATE_44_1:
312 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_44KHZ;
313 break;
314 case AUD_SAMPLE_RATE_48:
315 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_48KHZ;
316 break;
317 case AUD_SAMPLE_RATE_88_2:
318 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_88KHZ;
319 break;
320 case AUD_SAMPLE_RATE_96:
321 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_96KHZ;
322 break;
323 case AUD_SAMPLE_RATE_176_4:
324 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_176KHZ;
325 break;
326 case AUD_SAMPLE_RATE_192:
327 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_192KHZ;
328 break;
329
330 default:
331 /* control should never come here */
332 return -EINVAL;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530333 }
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100334
Takashi Iwai79dda752017-01-30 17:23:39 +0100335 had_write_register(intelhaddata,
336 AUD_CH_STATUS_0, ch_stat0.status_0_regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530337
338 format = substream->runtime->format;
339
340 if (format == SNDRV_PCM_FORMAT_S16_LE) {
341 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_20;
342 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_16BITS;
343 } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
344 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_24;
345 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_24BITS;
346 } else {
347 ch_stat1.status_1_regx.max_wrd_len = 0;
348 ch_stat1.status_1_regx.wrd_len = 0;
349 }
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100350
Takashi Iwai79dda752017-01-30 17:23:39 +0100351 had_write_register(intelhaddata,
352 AUD_CH_STATUS_1, ch_stat1.status_1_regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530353 return 0;
354}
355
Takashi Iwai76296ef2017-01-30 16:09:11 +0100356/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530357 * function to initialize audio
358 * registers and buffer confgiuration registers
359 * This function is called in the prepare callback
360 */
Takashi Iwai76296ef2017-01-30 16:09:11 +0100361static int snd_intelhad_audio_ctrl(struct snd_pcm_substream *substream,
362 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530363{
364 union aud_cfg cfg_val = {.cfg_regval = 0};
365 union aud_buf_config buf_cfg = {.buf_cfgval = 0};
366 u8 channels;
367
368 had_prog_status_reg(substream, intelhaddata);
369
Takashi Iwai4151ee82017-01-31 18:14:15 +0100370 buf_cfg.buf_cfg_regx.audio_fifo_watermark = FIFO_THRESHOLD;
371 buf_cfg.buf_cfg_regx.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
372 buf_cfg.buf_cfg_regx.aud_delay = 0;
Takashi Iwai79dda752017-01-30 17:23:39 +0100373 had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.buf_cfgval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530374
375 channels = substream->runtime->channels;
Takashi Iwai4151ee82017-01-31 18:14:15 +0100376 cfg_val.cfg_regx.num_ch = channels - 2;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530377 if (channels <= 2)
Takashi Iwai4151ee82017-01-31 18:14:15 +0100378 cfg_val.cfg_regx.layout = LAYOUT0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530379 else
Takashi Iwai4151ee82017-01-31 18:14:15 +0100380 cfg_val.cfg_regx.layout = LAYOUT1;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530381
Takashi Iwai4151ee82017-01-31 18:14:15 +0100382 cfg_val.cfg_regx.val_bit = 1;
Takashi Iwai79dda752017-01-30 17:23:39 +0100383 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.cfg_regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530384 return 0;
385}
386
Jerome Anand5dab11d2017-01-25 04:27:52 +0530387/*
388 * Compute derived values in channel_allocations[].
389 */
390static void init_channel_allocations(void)
391{
392 int i, j;
393 struct cea_channel_speaker_allocation *p;
394
Jerome Anand5dab11d2017-01-25 04:27:52 +0530395 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
396 p = channel_allocations + i;
397 p->channels = 0;
398 p->spk_mask = 0;
399 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
400 if (p->speakers[j]) {
401 p->channels++;
402 p->spk_mask |= p->speakers[j];
403 }
404 }
405}
406
407/*
408 * The transformation takes two steps:
409 *
410 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
411 * spk_mask => (channel_allocations[]) => ai->CA
412 *
413 * TODO: it could select the wrong CA from multiple candidates.
414 */
415static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata,
416 int channels)
417{
418 int i;
419 int ca = 0;
420 int spk_mask = 0;
421
422 /*
423 * CA defaults to 0 for basic stereo audio
424 */
425 if (channels <= 2)
426 return 0;
427
428 /*
429 * expand ELD's speaker allocation mask
430 *
431 * ELD tells the speaker mask in a compact(paired) form,
432 * expand ELD's notions to match the ones used by Audio InfoFrame.
433 */
434
435 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
Takashi Iwaida864802017-01-31 13:52:22 +0100436 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530437 spk_mask |= eld_speaker_allocation_bits[i];
438 }
439
440 /* search for the first working match in the CA table */
441 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
442 if (channels == channel_allocations[i].channels &&
443 (spk_mask & channel_allocations[i].spk_mask) ==
444 channel_allocations[i].spk_mask) {
445 ca = channel_allocations[i].ca_index;
446 break;
447 }
448 }
449
Takashi Iwaic75b0472017-01-31 15:49:15 +0100450 dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530451
452 return ca;
453}
454
455/* from speaker bit mask to ALSA API channel position */
456static int spk_to_chmap(int spk)
457{
Takashi Iwai4a5ddb22017-02-01 16:45:38 +0100458 const struct channel_map_table *t = map_tables;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530459
460 for (; t->map; t++) {
461 if (t->spk_mask == spk)
462 return t->map;
463 }
464 return 0;
465}
466
Takashi Iwai372d8552017-01-31 13:57:58 +0100467static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530468{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100469 int i, c;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530470 int spk_mask = 0;
471 struct snd_pcm_chmap_elem *chmap;
472 u8 eld_high, eld_high_mask = 0xF0;
473 u8 high_msb;
474
475 chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100476 if (!chmap) {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530477 intelhaddata->chmap->chmap = NULL;
478 return;
479 }
480
Takashi Iwaic75b0472017-01-31 15:49:15 +0100481 dev_dbg(intelhaddata->dev, "eld.speaker_allocation_block = %x\n",
Takashi Iwaida864802017-01-31 13:52:22 +0100482 intelhaddata->eld.speaker_allocation_block);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530483
484 /* WA: Fix the max channel supported to 8 */
485
486 /*
487 * Sink may support more than 8 channels, if eld_high has more than
488 * one bit set. SOC supports max 8 channels.
489 * Refer eld_speaker_allocation_bits, for sink speaker allocation
490 */
491
492 /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
Takashi Iwaida864802017-01-31 13:52:22 +0100493 eld_high = intelhaddata->eld.speaker_allocation_block & eld_high_mask;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530494 if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
495 /* eld_high & (eld_high-1): if more than 1 bit set */
496 /* 0x1F: 7 channels */
497 for (i = 1; i < 4; i++) {
498 high_msb = eld_high & (0x80 >> i);
499 if (high_msb) {
Takashi Iwaida864802017-01-31 13:52:22 +0100500 intelhaddata->eld.speaker_allocation_block &=
Jerome Anand5dab11d2017-01-25 04:27:52 +0530501 high_msb | 0xF;
502 break;
503 }
504 }
505 }
506
507 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
Takashi Iwaida864802017-01-31 13:52:22 +0100508 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530509 spk_mask |= eld_speaker_allocation_bits[i];
510 }
511
512 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
513 if (spk_mask == channel_allocations[i].spk_mask) {
514 for (c = 0; c < channel_allocations[i].channels; c++) {
515 chmap->map[c] = spk_to_chmap(
516 channel_allocations[i].speakers[
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100517 (MAX_SPEAKERS - 1) - c]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530518 }
519 chmap->channels = channel_allocations[i].channels;
520 intelhaddata->chmap->chmap = chmap;
521 break;
522 }
523 }
524 if (i >= ARRAY_SIZE(channel_allocations)) {
525 intelhaddata->chmap->chmap = NULL;
526 kfree(chmap);
527 }
528}
529
530/*
531 * ALSA API channel-map control callbacks
532 */
533static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_info *uinfo)
535{
536 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
537 struct snd_intelhad *intelhaddata = info->private_data;
538
539 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
540 return -ENODEV;
541 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
542 uinfo->count = HAD_MAX_CHANNEL;
543 uinfo->value.integer.min = 0;
544 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
545 return 0;
546}
547
548static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
549 struct snd_ctl_elem_value *ucontrol)
550{
551 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
552 struct snd_intelhad *intelhaddata = info->private_data;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100553 int i;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530554 const struct snd_pcm_chmap_elem *chmap;
555
556 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
557 return -ENODEV;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100558 if (!intelhaddata->chmap->chmap)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530559 return -ENODATA;
560 chmap = intelhaddata->chmap->chmap;
Takashi Iwaic75b0472017-01-31 15:49:15 +0100561 for (i = 0; i < chmap->channels; i++)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530562 ucontrol->value.integer.value[i] = chmap->map[i];
Jerome Anand5dab11d2017-01-25 04:27:52 +0530563
564 return 0;
565}
566
567static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
568 struct snd_pcm *pcm)
569{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100570 int err;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530571
572 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
573 NULL, 0, (unsigned long)intelhaddata,
574 &intelhaddata->chmap);
575 if (err < 0)
576 return err;
577
578 intelhaddata->chmap->private_data = intelhaddata;
Takashi Iwaie9d65ab2017-01-31 16:11:27 +0100579 intelhaddata->chmap->kctl->info = had_chmap_ctl_info;
580 intelhaddata->chmap->kctl->get = had_chmap_ctl_get;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530581 intelhaddata->chmap->chmap = NULL;
582 return 0;
583}
584
Takashi Iwai76296ef2017-01-30 16:09:11 +0100585/*
586 * snd_intelhad_prog_dip - to initialize Data Island Packets registers
Jerome Anand5dab11d2017-01-25 04:27:52 +0530587 *
588 * @substream:substream for which the prepare function is called
589 * @intelhaddata:substream private data
590 *
591 * This function is called in the prepare callback
592 */
Takashi Iwai76296ef2017-01-30 16:09:11 +0100593static void snd_intelhad_prog_dip(struct snd_pcm_substream *substream,
594 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530595{
596 int i;
597 union aud_ctrl_st ctrl_state = {.ctrl_val = 0};
598 union aud_info_frame2 frame2 = {.fr2_val = 0};
599 union aud_info_frame3 frame3 = {.fr3_val = 0};
600 u8 checksum = 0;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600601 u32 info_frame;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530602 int channels;
603
604 channels = substream->runtime->channels;
605
Takashi Iwai79dda752017-01-30 17:23:39 +0100606 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530607
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600608 if (intelhaddata->dp_output) {
609 info_frame = DP_INFO_FRAME_WORD1;
610 frame2.fr2_val = 1;
611 } else {
612 info_frame = HDMI_INFO_FRAME_WORD1;
613 frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530614
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600615 frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation(
616 intelhaddata, channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530617
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100618 /* Calculte the byte wide checksum for all valid DIP words */
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600619 for (i = 0; i < BYTES_PER_WORD; i++)
620 checksum += (info_frame >> i*BITS_PER_BYTE) & MASK_BYTE0;
621 for (i = 0; i < BYTES_PER_WORD; i++)
622 checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
623 for (i = 0; i < BYTES_PER_WORD; i++)
624 checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530625
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600626 frame2.fr2_regx.chksum = -(checksum);
627 }
Jerome Anand5dab11d2017-01-25 04:27:52 +0530628
Takashi Iwai4151ee82017-01-31 18:14:15 +0100629 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, info_frame);
630 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame2.fr2_val);
631 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame3.fr3_val);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530632
633 /* program remaining DIP words with zero */
634 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
Takashi Iwai4151ee82017-01-31 18:14:15 +0100635 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, 0x0);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530636
637 ctrl_state.ctrl_regx.dip_freq = 1;
638 ctrl_state.ctrl_regx.dip_en_sta = 1;
Takashi Iwai79dda752017-01-30 17:23:39 +0100639 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530640}
641
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100642/*
643 * snd_intelhad_prog_buffer - programs buffer address and length registers
Jerome Anand5dab11d2017-01-25 04:27:52 +0530644 * @substream:substream for which the prepare function is called
645 * @intelhaddata:substream private data
646 *
647 * This function programs ring buffer address and length into registers.
648 */
Takashi Iwai372d8552017-01-31 13:57:58 +0100649static int snd_intelhad_prog_buffer(struct snd_intelhad *intelhaddata,
Jerome Anand5dab11d2017-01-25 04:27:52 +0530650 int start, int end)
651{
652 u32 ring_buf_addr, ring_buf_size, period_bytes;
653 u8 i, num_periods;
654 struct snd_pcm_substream *substream;
655
656 substream = intelhaddata->stream_info.had_substream;
Takashi Iwaic75b0472017-01-31 15:49:15 +0100657 if (WARN_ON(!substream))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530658 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530659
660 ring_buf_addr = substream->runtime->dma_addr;
661 ring_buf_size = snd_pcm_lib_buffer_bytes(substream);
662 intelhaddata->stream_info.ring_buf_size = ring_buf_size;
663 period_bytes = frames_to_bytes(substream->runtime,
664 substream->runtime->period_size);
665 num_periods = substream->runtime->periods;
666
667 /*
668 * buffer addr should be 64 byte aligned, period bytes
669 * will be used to calculate addr offset
670 */
671 period_bytes &= ~0x3F;
672
673 /* Hardware supports MAX_PERIODS buffers */
674 if (end >= HAD_MAX_PERIODS)
675 return -EINVAL;
676
677 for (i = start; i <= end; i++) {
678 /* Program the buf registers with addr and len */
679 intelhaddata->buf_info[i].buf_addr = ring_buf_addr +
680 (i * period_bytes);
681 if (i < num_periods-1)
682 intelhaddata->buf_info[i].buf_size = period_bytes;
683 else
684 intelhaddata->buf_info[i].buf_size = ring_buf_size -
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100685 (i * period_bytes);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530686
Takashi Iwai79dda752017-01-30 17:23:39 +0100687 had_write_register(intelhaddata,
688 AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH),
Jerome Anand5dab11d2017-01-25 04:27:52 +0530689 intelhaddata->buf_info[i].buf_addr |
690 BIT(0) | BIT(1));
Takashi Iwai79dda752017-01-30 17:23:39 +0100691 had_write_register(intelhaddata,
692 AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
Jerome Anand5dab11d2017-01-25 04:27:52 +0530693 period_bytes);
694 intelhaddata->buf_info[i].is_valid = true;
695 }
Takashi Iwaic75b0472017-01-31 15:49:15 +0100696 dev_dbg(intelhaddata->dev, "%s:buf[%d-%d] addr=%#x and size=%d\n",
697 __func__, start, end,
698 intelhaddata->buf_info[start].buf_addr,
699 intelhaddata->buf_info[start].buf_size);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530700 intelhaddata->valid_buf_cnt = num_periods;
701 return 0;
702}
703
Takashi Iwai372d8552017-01-31 13:57:58 +0100704static int snd_intelhad_read_len(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530705{
706 int i, retval = 0;
707 u32 len[4];
708
709 for (i = 0; i < 4 ; i++) {
Takashi Iwai79dda752017-01-30 17:23:39 +0100710 had_read_register(intelhaddata,
711 AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
712 &len[i]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530713 if (!len[i])
714 retval++;
715 }
716 if (retval != 1) {
717 for (i = 0; i < 4 ; i++)
Takashi Iwaic75b0472017-01-31 15:49:15 +0100718 dev_dbg(intelhaddata->dev, "buf[%d] size=%d\n",
719 i, len[i]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530720 }
721
722 return retval;
723}
724
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600725static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
726{
727 u32 maud_val;
728
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100729 /* Select maud according to DP 1.2 spec */
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600730 if (link_rate == DP_2_7_GHZ) {
731 switch (aud_samp_freq) {
732 case AUD_SAMPLE_RATE_32:
733 maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
734 break;
735
736 case AUD_SAMPLE_RATE_44_1:
737 maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
738 break;
739
740 case AUD_SAMPLE_RATE_48:
741 maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
742 break;
743
744 case AUD_SAMPLE_RATE_88_2:
745 maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
746 break;
747
748 case AUD_SAMPLE_RATE_96:
749 maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
750 break;
751
752 case AUD_SAMPLE_RATE_176_4:
753 maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
754 break;
755
756 case HAD_MAX_RATE:
757 maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
758 break;
759
760 default:
761 maud_val = -EINVAL;
762 break;
763 }
764 } else if (link_rate == DP_1_62_GHZ) {
765 switch (aud_samp_freq) {
766 case AUD_SAMPLE_RATE_32:
767 maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
768 break;
769
770 case AUD_SAMPLE_RATE_44_1:
771 maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
772 break;
773
774 case AUD_SAMPLE_RATE_48:
775 maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
776 break;
777
778 case AUD_SAMPLE_RATE_88_2:
779 maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
780 break;
781
782 case AUD_SAMPLE_RATE_96:
783 maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
784 break;
785
786 case AUD_SAMPLE_RATE_176_4:
787 maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
788 break;
789
790 case HAD_MAX_RATE:
791 maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
792 break;
793
794 default:
795 maud_val = -EINVAL;
796 break;
797 }
798 } else
799 maud_val = -EINVAL;
800
801 return maud_val;
802}
803
Takashi Iwai76296ef2017-01-30 16:09:11 +0100804/*
805 * snd_intelhad_prog_cts - Program HDMI audio CTS value
Jerome Anand5dab11d2017-01-25 04:27:52 +0530806 *
807 * @aud_samp_freq: sampling frequency of audio data
808 * @tmds: sampling frequency of the display data
809 * @n_param: N value, depends on aud_samp_freq
810 * @intelhaddata:substream private data
811 *
812 * Program CTS register based on the audio and display sampling frequency
813 */
Takashi Iwai76296ef2017-01-30 16:09:11 +0100814static void snd_intelhad_prog_cts(u32 aud_samp_freq, u32 tmds,
815 u32 link_rate, u32 n_param,
816 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530817{
818 u32 cts_val;
819 u64 dividend, divisor;
820
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600821 if (intelhaddata->dp_output) {
822 /* Substitute cts_val with Maud according to DP 1.2 spec*/
823 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
824 } else {
825 /* Calculate CTS according to HDMI 1.3a spec*/
826 dividend = (u64)tmds * n_param*1000;
827 divisor = 128 * aud_samp_freq;
828 cts_val = div64_u64(dividend, divisor);
829 }
Takashi Iwaic75b0472017-01-31 15:49:15 +0100830 dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n",
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600831 tmds, n_param, cts_val);
Takashi Iwai79dda752017-01-30 17:23:39 +0100832 had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530833}
834
835static int had_calculate_n_value(u32 aud_samp_freq)
836{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100837 int n_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530838
839 /* Select N according to HDMI 1.3a spec*/
840 switch (aud_samp_freq) {
841 case AUD_SAMPLE_RATE_32:
842 n_val = 4096;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100843 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530844
845 case AUD_SAMPLE_RATE_44_1:
846 n_val = 6272;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100847 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530848
849 case AUD_SAMPLE_RATE_48:
850 n_val = 6144;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100851 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530852
853 case AUD_SAMPLE_RATE_88_2:
854 n_val = 12544;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100855 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530856
857 case AUD_SAMPLE_RATE_96:
858 n_val = 12288;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100859 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530860
861 case AUD_SAMPLE_RATE_176_4:
862 n_val = 25088;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100863 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530864
865 case HAD_MAX_RATE:
866 n_val = 24576;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100867 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530868
869 default:
870 n_val = -EINVAL;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100871 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530872 }
873 return n_val;
874}
875
Takashi Iwai76296ef2017-01-30 16:09:11 +0100876/*
877 * snd_intelhad_prog_n - Program HDMI audio N value
Jerome Anand5dab11d2017-01-25 04:27:52 +0530878 *
879 * @aud_samp_freq: sampling frequency of audio data
880 * @n_param: N value, depends on aud_samp_freq
881 * @intelhaddata:substream private data
882 *
883 * This function is called in the prepare callback.
884 * It programs based on the audio and display sampling frequency
885 */
Takashi Iwai76296ef2017-01-30 16:09:11 +0100886static int snd_intelhad_prog_n(u32 aud_samp_freq, u32 *n_param,
887 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530888{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100889 int n_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530890
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600891 if (intelhaddata->dp_output) {
892 /*
893 * According to DP specs, Maud and Naud values hold
894 * a relationship, which is stated as:
895 * Maud/Naud = 512 * fs / f_LS_Clk
896 * where, fs is the sampling frequency of the audio stream
897 * and Naud is 32768 for Async clock.
898 */
899
900 n_val = DP_NAUD_VAL;
901 } else
902 n_val = had_calculate_n_value(aud_samp_freq);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530903
904 if (n_val < 0)
905 return n_val;
906
Takashi Iwai79dda752017-01-30 17:23:39 +0100907 had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530908 *n_param = n_val;
909 return 0;
910}
911
Takashi Iwai372d8552017-01-31 13:57:58 +0100912static void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530913{
Takashi Iwai79f439e2017-01-31 16:46:44 +0100914 u32 hdmi_status = 0, i = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530915
916 /* Handle Underrun interrupt within Audio Unit */
Takashi Iwai79dda752017-01-30 17:23:39 +0100917 had_write_register(intelhaddata, AUD_CONFIG, 0);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530918 /* Reset buffer pointers */
Takashi Iwai4151ee82017-01-31 18:14:15 +0100919 had_write_register(intelhaddata, AUD_HDMI_STATUS, 1);
920 had_write_register(intelhaddata, AUD_HDMI_STATUS, 0);
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100921 /*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530922 * The interrupt status 'sticky' bits might not be cleared by
923 * setting '1' to that bit once...
924 */
925 do { /* clear bit30, 31 AUD_HDMI_STATUS */
Takashi Iwai4151ee82017-01-31 18:14:15 +0100926 had_read_register(intelhaddata, AUD_HDMI_STATUS,
Takashi Iwai79dda752017-01-30 17:23:39 +0100927 &hdmi_status);
Takashi Iwaic75b0472017-01-31 15:49:15 +0100928 dev_dbg(intelhaddata->dev, "HDMI status =0x%x\n", hdmi_status);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530929 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
930 i++;
Takashi Iwai79dda752017-01-30 17:23:39 +0100931 had_write_register(intelhaddata,
Takashi Iwai4151ee82017-01-31 18:14:15 +0100932 AUD_HDMI_STATUS, hdmi_status);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530933 } else
934 break;
935 } while (i < MAX_CNT);
936 if (i >= MAX_CNT)
Takashi Iwaic75b0472017-01-31 15:49:15 +0100937 dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n");
Jerome Anand5dab11d2017-01-25 04:27:52 +0530938}
939
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100940/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530941 * snd_intelhad_open - stream initializations are done here
942 * @substream:substream for which the stream function is called
943 *
944 * This function is called whenever a PCM stream is opened
945 */
946static int snd_intelhad_open(struct snd_pcm_substream *substream)
947{
948 struct snd_intelhad *intelhaddata;
949 struct snd_pcm_runtime *runtime;
950 struct had_stream_pvt *stream;
Takashi Iwai5647aec2017-01-31 08:14:34 +0100951 struct had_stream_data *had_stream;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530952 int retval;
953
Jerome Anand5dab11d2017-01-25 04:27:52 +0530954 intelhaddata = snd_pcm_substream_chip(substream);
Takashi Iwai5647aec2017-01-31 08:14:34 +0100955 had_stream = &intelhaddata->stream_data;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530956 runtime = substream->runtime;
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +0100957 intelhaddata->underrun_count = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530958
959 pm_runtime_get(intelhaddata->dev);
960
Takashi Iwai79f439e2017-01-31 16:46:44 +0100961 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +0100962 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
963 __func__);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530964 retval = -ENODEV;
965 goto exit_put_handle;
966 }
967
968 /* Check, if device already in use */
969 if (runtime->private_data) {
Takashi Iwaic75b0472017-01-31 15:49:15 +0100970 dev_dbg(intelhaddata->dev, "Device already in use\n");
Jerome Anand5dab11d2017-01-25 04:27:52 +0530971 retval = -EBUSY;
972 goto exit_put_handle;
973 }
974
975 /* set the runtime hw parameter with local snd_pcm_hardware struct */
976 runtime->hw = snd_intel_hadstream;
977
978 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
979 if (!stream) {
980 retval = -ENOMEM;
981 goto exit_put_handle;
982 }
983 stream->stream_status = STREAM_INIT;
984 runtime->private_data = stream;
985
986 retval = snd_pcm_hw_constraint_integer(runtime,
987 SNDRV_PCM_HW_PARAM_PERIODS);
988 if (retval < 0)
989 goto exit_err;
990
991 /* Make sure, that the period size is always aligned
992 * 64byte boundary
993 */
994 retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
995 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
996 if (retval < 0) {
Takashi Iwaic75b0472017-01-31 15:49:15 +0100997 dev_dbg(intelhaddata->dev, "%s:step_size=64 failed,err=%d\n",
998 __func__, retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530999 goto exit_err;
1000 }
1001
1002 return retval;
1003exit_err:
1004 kfree(stream);
1005exit_put_handle:
1006 pm_runtime_put(intelhaddata->dev);
1007 runtime->private_data = NULL;
1008 return retval;
1009}
1010
Takashi Iwaidf76df12017-01-31 16:04:10 +01001011/*
Jerome Anand5dab11d2017-01-25 04:27:52 +05301012 * had_period_elapsed - updates the hardware pointer status
Takashi Iwaidf76df12017-01-31 16:04:10 +01001013 * @had_substream: substream for which the stream function is called
Jerome Anand5dab11d2017-01-25 04:27:52 +05301014 */
Takashi Iwaidf76df12017-01-31 16:04:10 +01001015static void had_period_elapsed(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301016{
Jerome Anand5dab11d2017-01-25 04:27:52 +05301017 struct had_stream_pvt *stream;
1018
Jerome Anand5dab11d2017-01-25 04:27:52 +05301019 if (!substream || !substream->runtime)
1020 return;
1021 stream = substream->runtime->private_data;
1022 if (!stream)
1023 return;
1024
1025 if (stream->stream_status != STREAM_RUNNING)
1026 return;
1027 snd_pcm_period_elapsed(substream);
1028}
1029
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001030/*
1031 * snd_intelhad_close - to free parameteres when stream is stopped
Jerome Anand5dab11d2017-01-25 04:27:52 +05301032 * @substream: substream for which the function is called
1033 *
1034 * This function is called by ALSA framework when stream is stopped
1035 */
1036static int snd_intelhad_close(struct snd_pcm_substream *substream)
1037{
1038 struct snd_intelhad *intelhaddata;
1039 struct snd_pcm_runtime *runtime;
1040
Jerome Anand5dab11d2017-01-25 04:27:52 +05301041 intelhaddata = snd_pcm_substream_chip(substream);
1042 runtime = substream->runtime;
1043
Takashi Iwaic75b0472017-01-31 15:49:15 +01001044 if (WARN_ON(!runtime->private_data))
Jerome Anand5dab11d2017-01-25 04:27:52 +05301045 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301046
1047 intelhaddata->stream_info.buffer_rendered = 0;
1048 intelhaddata->stream_info.buffer_ptr = 0;
1049 intelhaddata->stream_info.str_id = 0;
1050 intelhaddata->stream_info.had_substream = NULL;
1051
1052 /* Check if following drv_status modification is required - VA */
1053 if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1054 intelhaddata->drv_status = HAD_DRV_CONNECTED;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001055 dev_dbg(intelhaddata->dev,
1056 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
Jerome Anand5dab11d2017-01-25 04:27:52 +05301057 __func__, __LINE__);
1058 }
1059 kfree(runtime->private_data);
1060 runtime->private_data = NULL;
1061 pm_runtime_put(intelhaddata->dev);
1062 return 0;
1063}
1064
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001065/*
1066 * snd_intelhad_hw_params - to setup the hardware parameters
1067 * like allocating the buffers
1068 * @substream: substream for which the function is called
Jerome Anand5dab11d2017-01-25 04:27:52 +05301069 * @hw_params: hardware parameters
1070 *
1071 * This function is called by ALSA framework when hardware params are set
1072 */
1073static int snd_intelhad_hw_params(struct snd_pcm_substream *substream,
1074 struct snd_pcm_hw_params *hw_params)
1075{
Takashi Iwaic75b0472017-01-31 15:49:15 +01001076 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301077 unsigned long addr;
1078 int pages, buf_size, retval;
1079
Jerome Anand5dab11d2017-01-25 04:27:52 +05301080 if (!hw_params)
1081 return -EINVAL;
1082
Takashi Iwaic75b0472017-01-31 15:49:15 +01001083 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301084 buf_size = params_buffer_bytes(hw_params);
1085 retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1086 if (retval < 0)
1087 return retval;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001088 dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n",
1089 __func__, buf_size);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301090 /* mark the pages as uncached region */
1091 addr = (unsigned long) substream->runtime->dma_area;
1092 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1093 retval = set_memory_uc(addr, pages);
1094 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001095 dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n",
1096 retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301097 return retval;
1098 }
1099 memset(substream->runtime->dma_area, 0, buf_size);
1100
1101 return retval;
1102}
1103
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001104/*
1105 * snd_intelhad_hw_free - to release the resources allocated during
1106 * hardware params setup
Jerome Anand5dab11d2017-01-25 04:27:52 +05301107 * @substream: substream for which the function is called
1108 *
1109 * This function is called by ALSA framework before close callback.
Jerome Anand5dab11d2017-01-25 04:27:52 +05301110 */
1111static int snd_intelhad_hw_free(struct snd_pcm_substream *substream)
1112{
1113 unsigned long addr;
1114 u32 pages;
1115
Jerome Anand5dab11d2017-01-25 04:27:52 +05301116 /* mark back the pages as cached/writeback region before the free */
1117 if (substream->runtime->dma_area != NULL) {
1118 addr = (unsigned long) substream->runtime->dma_area;
1119 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1120 PAGE_SIZE;
1121 set_memory_wb(addr, pages);
1122 return snd_pcm_lib_free_pages(substream);
1123 }
1124 return 0;
1125}
1126
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001127/*
Jerome Anand5dab11d2017-01-25 04:27:52 +05301128 * snd_intelhad_pcm_trigger - stream activities are handled here
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001129 * @substream: substream for which the stream function is called
1130 * @cmd: the stream commamd thats requested from upper layer
1131 *
Jerome Anand5dab11d2017-01-25 04:27:52 +05301132 * This function is called whenever an a stream activity is invoked
1133 */
1134static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream,
1135 int cmd)
1136{
Takashi Iwaida864802017-01-31 13:52:22 +01001137 int retval = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301138 struct snd_intelhad *intelhaddata;
1139 struct had_stream_pvt *stream;
Takashi Iwai5647aec2017-01-31 08:14:34 +01001140 struct had_stream_data *had_stream;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301141
Jerome Anand5dab11d2017-01-25 04:27:52 +05301142 intelhaddata = snd_pcm_substream_chip(substream);
1143 stream = substream->runtime->private_data;
Takashi Iwai5647aec2017-01-31 08:14:34 +01001144 had_stream = &intelhaddata->stream_data;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301145
1146 switch (cmd) {
1147 case SNDRV_PCM_TRIGGER_START:
Jerome Anand5dab11d2017-01-25 04:27:52 +05301148 /* Disable local INTRs till register prgmng is done */
Takashi Iwai79f439e2017-01-31 16:46:44 +01001149 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001150 dev_dbg(intelhaddata->dev,
1151 "_START: HDMI cable plugged-out\n");
Jerome Anand5dab11d2017-01-25 04:27:52 +05301152 retval = -ENODEV;
1153 break;
1154 }
1155 stream->stream_status = STREAM_RUNNING;
1156
1157 had_stream->stream_type = HAD_RUNNING_STREAM;
1158
1159 /* Enable Audio */
Takashi Iwaida864802017-01-31 13:52:22 +01001160 snd_intelhad_enable_audio_int(intelhaddata, true);
1161 snd_intelhad_enable_audio(intelhaddata, true);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301162 break;
1163
1164 case SNDRV_PCM_TRIGGER_STOP:
Takashi Iwaibcce7752017-02-01 17:18:20 +01001165 spin_lock(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301166 intelhaddata->stream_info.str_id = 0;
1167 intelhaddata->curr_buf = 0;
1168
Takashi Iwaic75b0472017-01-31 15:49:15 +01001169 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */
Jerome Anand5dab11d2017-01-25 04:27:52 +05301170
1171 had_stream->stream_type = HAD_INIT;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001172 spin_unlock(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301173 /* Disable Audio */
Takashi Iwaida864802017-01-31 13:52:22 +01001174 snd_intelhad_enable_audio_int(intelhaddata, false);
1175 snd_intelhad_enable_audio(intelhaddata, false);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301176 /* Reset buffer pointers */
Takashi Iwai79dda752017-01-30 17:23:39 +01001177 snd_intelhad_reset_audio(intelhaddata, 1);
1178 snd_intelhad_reset_audio(intelhaddata, 0);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301179 stream->stream_status = STREAM_DROPPED;
Takashi Iwaida864802017-01-31 13:52:22 +01001180 snd_intelhad_enable_audio_int(intelhaddata, false);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301181 break;
1182
1183 default:
1184 retval = -EINVAL;
1185 }
1186 return retval;
1187}
1188
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001189/*
1190 * snd_intelhad_pcm_prepare - internal preparation before starting a stream
1191 * @substream: substream for which the function is called
Jerome Anand5dab11d2017-01-25 04:27:52 +05301192 *
1193 * This function is called when a stream is started for internal preparation.
1194 */
1195static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream)
1196{
1197 int retval;
1198 u32 disp_samp_freq, n_param;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001199 u32 link_rate = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301200 struct snd_intelhad *intelhaddata;
1201 struct snd_pcm_runtime *runtime;
Takashi Iwai5647aec2017-01-31 08:14:34 +01001202 struct had_stream_data *had_stream;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301203
Jerome Anand5dab11d2017-01-25 04:27:52 +05301204 intelhaddata = snd_pcm_substream_chip(substream);
1205 runtime = substream->runtime;
Takashi Iwai5647aec2017-01-31 08:14:34 +01001206 had_stream = &intelhaddata->stream_data;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301207
Takashi Iwai79f439e2017-01-31 16:46:44 +01001208 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001209 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1210 __func__);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301211 retval = -ENODEV;
1212 goto prep_end;
1213 }
1214
Takashi Iwaic75b0472017-01-31 15:49:15 +01001215 dev_dbg(intelhaddata->dev, "period_size=%d\n",
Jerome Anand5dab11d2017-01-25 04:27:52 +05301216 (int)frames_to_bytes(runtime, runtime->period_size));
Takashi Iwaic75b0472017-01-31 15:49:15 +01001217 dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods);
1218 dev_dbg(intelhaddata->dev, "buffer_size=%d\n",
1219 (int)snd_pcm_lib_buffer_bytes(substream));
1220 dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate);
1221 dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301222
1223 if (intelhaddata->stream_info.str_id) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001224 dev_dbg(intelhaddata->dev,
1225 "_prepare is called for existing str_id#%d\n",
Jerome Anand5dab11d2017-01-25 04:27:52 +05301226 intelhaddata->stream_info.str_id);
1227 retval = snd_intelhad_pcm_trigger(substream,
1228 SNDRV_PCM_TRIGGER_STOP);
1229 return retval;
1230 }
1231
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001232 intelhaddata->stream_info.had_substream = substream;
1233 intelhaddata->stream_info.buffer_ptr = 0;
1234 intelhaddata->stream_info.buffer_rendered = 0;
1235 intelhaddata->stream_info.sfreq = substream->runtime->rate;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301236
1237 /* Get N value in KHz */
Takashi Iwaida864802017-01-31 13:52:22 +01001238 disp_samp_freq = intelhaddata->tmds_clock_speed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301239
Takashi Iwai76296ef2017-01-30 16:09:11 +01001240 retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1241 intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301242 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001243 dev_err(intelhaddata->dev,
1244 "programming N value failed %#x\n", retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301245 goto prep_end;
1246 }
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001247
1248 if (intelhaddata->dp_output)
Takashi Iwaida864802017-01-31 13:52:22 +01001249 link_rate = intelhaddata->link_rate;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001250
Takashi Iwai76296ef2017-01-30 16:09:11 +01001251 snd_intelhad_prog_cts(substream->runtime->rate,
1252 disp_samp_freq, link_rate,
1253 n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301254
Takashi Iwai76296ef2017-01-30 16:09:11 +01001255 snd_intelhad_prog_dip(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301256
Takashi Iwai76296ef2017-01-30 16:09:11 +01001257 retval = snd_intelhad_audio_ctrl(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301258
1259 /* Prog buffer address */
1260 retval = snd_intelhad_prog_buffer(intelhaddata,
1261 HAD_BUF_TYPE_A, HAD_BUF_TYPE_D);
1262
1263 /*
1264 * Program channel mapping in following order:
1265 * FL, FR, C, LFE, RL, RR
1266 */
1267
Takashi Iwai79dda752017-01-30 17:23:39 +01001268 had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301269
1270prep_end:
1271 return retval;
1272}
1273
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001274/*
Jerome Anand5dab11d2017-01-25 04:27:52 +05301275 * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001276 * @substream: substream for which the function is called
Jerome Anand5dab11d2017-01-25 04:27:52 +05301277 *
1278 * This function is called by ALSA framework to get the current hw buffer ptr
1279 * when a period is elapsed
1280 */
1281static snd_pcm_uframes_t snd_intelhad_pcm_pointer(
1282 struct snd_pcm_substream *substream)
1283{
1284 struct snd_intelhad *intelhaddata;
1285 u32 bytes_rendered = 0;
1286 u32 t;
1287 int buf_id;
1288
Jerome Anand5dab11d2017-01-25 04:27:52 +05301289 intelhaddata = snd_pcm_substream_chip(substream);
1290
Takashi Iwai79f439e2017-01-31 16:46:44 +01001291 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
1292 return SNDRV_PCM_POS_XRUN;
1293
Jerome Anand5dab11d2017-01-25 04:27:52 +05301294 if (intelhaddata->flag_underrun) {
Takashi Iwaie9d65ab2017-01-31 16:11:27 +01001295 intelhaddata->flag_underrun = false;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301296 return SNDRV_PCM_POS_XRUN;
1297 }
1298
1299 /* Use a hw register to calculate sub-period position reports.
1300 * This makes PulseAudio happier.
1301 */
1302
1303 buf_id = intelhaddata->curr_buf % 4;
Takashi Iwai79dda752017-01-30 17:23:39 +01001304 had_read_register(intelhaddata,
1305 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t);
Jerome Anand232892f2017-01-25 04:27:53 +05301306
1307 if ((t == 0) || (t == ((u32)-1L))) {
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +01001308 intelhaddata->underrun_count++;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001309 dev_dbg(intelhaddata->dev,
1310 "discovered buffer done for buf %d, count = %d\n",
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +01001311 buf_id, intelhaddata->underrun_count);
Jerome Anand232892f2017-01-25 04:27:53 +05301312
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +01001313 if (intelhaddata->underrun_count > (HAD_MIN_PERIODS/2)) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001314 dev_dbg(intelhaddata->dev,
1315 "assume audio_codec_reset, underrun = %d - do xrun\n",
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +01001316 intelhaddata->underrun_count);
1317 intelhaddata->underrun_count = 0;
Jerome Anand232892f2017-01-25 04:27:53 +05301318 return SNDRV_PCM_POS_XRUN;
1319 }
1320 } else {
1321 /* Reset Counter */
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +01001322 intelhaddata->underrun_count = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301323 }
Jerome Anand232892f2017-01-25 04:27:53 +05301324
Jerome Anand5dab11d2017-01-25 04:27:52 +05301325 t = intelhaddata->buf_info[buf_id].buf_size - t;
1326
1327 if (intelhaddata->stream_info.buffer_rendered)
1328 div_u64_rem(intelhaddata->stream_info.buffer_rendered,
1329 intelhaddata->stream_info.ring_buf_size,
1330 &(bytes_rendered));
1331
1332 intelhaddata->stream_info.buffer_ptr = bytes_to_frames(
1333 substream->runtime,
1334 bytes_rendered + t);
1335 return intelhaddata->stream_info.buffer_ptr;
1336}
1337
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001338/*
Jerome Anand5dab11d2017-01-25 04:27:52 +05301339 * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001340 * @substream: substream for which the function is called
1341 * @vma: struct instance of memory VMM memory area
Jerome Anand5dab11d2017-01-25 04:27:52 +05301342 *
1343 * This function is called by OS when a user space component
1344 * tries to get mmap memory from driver
1345 */
1346static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream,
1347 struct vm_area_struct *vma)
1348{
Jerome Anand5dab11d2017-01-25 04:27:52 +05301349 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1350 return remap_pfn_range(vma, vma->vm_start,
1351 substream->dma_buffer.addr >> PAGE_SHIFT,
1352 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1353}
1354
Takashi Iwaida864802017-01-31 13:52:22 +01001355static int hdmi_audio_mode_change(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301356{
Takashi Iwaida864802017-01-31 13:52:22 +01001357 struct snd_pcm_substream *substream;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301358 int retval = 0;
1359 u32 disp_samp_freq, n_param;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001360 u32 link_rate = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301361
Takashi Iwaida864802017-01-31 13:52:22 +01001362 substream = intelhaddata->stream_info.had_substream;
1363 if (!substream || !substream->runtime)
1364 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301365
1366 /* Disable Audio */
Takashi Iwaida864802017-01-31 13:52:22 +01001367 snd_intelhad_enable_audio(intelhaddata, false);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301368
1369 /* Update CTS value */
Takashi Iwaida864802017-01-31 13:52:22 +01001370 disp_samp_freq = intelhaddata->tmds_clock_speed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301371
Takashi Iwai76296ef2017-01-30 16:09:11 +01001372 retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1373 intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301374 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001375 dev_err(intelhaddata->dev,
1376 "programming N value failed %#x\n", retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301377 goto out;
1378 }
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001379
1380 if (intelhaddata->dp_output)
Takashi Iwaida864802017-01-31 13:52:22 +01001381 link_rate = intelhaddata->link_rate;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001382
Takashi Iwai76296ef2017-01-30 16:09:11 +01001383 snd_intelhad_prog_cts(substream->runtime->rate,
1384 disp_samp_freq, link_rate,
1385 n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301386
1387 /* Enable Audio */
Takashi Iwaida864802017-01-31 13:52:22 +01001388 snd_intelhad_enable_audio(intelhaddata, true);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301389
1390out:
1391 return retval;
1392}
1393
Takashi Iwai372d8552017-01-31 13:57:58 +01001394/*
1395 * hdmi_lpe_audio_suspend - power management suspend function
Takashi Iwai372d8552017-01-31 13:57:58 +01001396 * @pdev: platform device
1397 *
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001398 * This function is called to suspend the hdmi audio.
Takashi Iwai372d8552017-01-31 13:57:58 +01001399 */
1400static int hdmi_lpe_audio_suspend(struct platform_device *pdev,
1401 pm_message_t state)
1402{
1403 struct had_stream_data *had_stream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001404 struct snd_pcm_substream *substream;
1405 struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1406
Takashi Iwai372d8552017-01-31 13:57:58 +01001407 had_stream = &intelhaddata->stream_data;
1408 substream = intelhaddata->stream_info.had_substream;
1409
Takashi Iwaie29c0f92017-02-01 17:27:48 +01001410 if (!pm_runtime_status_suspended(intelhaddata->dev)) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001411 dev_err(intelhaddata->dev, "audio stream is active\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001412 return -EAGAIN;
1413 }
1414
Takashi Iwaibcce7752017-02-01 17:18:20 +01001415 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001416 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001417 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwaic75b0472017-01-31 15:49:15 +01001418 dev_dbg(intelhaddata->dev, "had not connected\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001419 return 0;
1420 }
1421
1422 if (intelhaddata->drv_status == HAD_DRV_SUSPENDED) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001423 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwaic75b0472017-01-31 15:49:15 +01001424 dev_dbg(intelhaddata->dev, "had already suspended\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001425 return 0;
1426 }
1427
1428 intelhaddata->drv_status = HAD_DRV_SUSPENDED;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001429 dev_dbg(intelhaddata->dev,
1430 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_SUSPENDED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001431 __func__, __LINE__);
1432
Takashi Iwaibcce7752017-02-01 17:18:20 +01001433 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001434 snd_intelhad_enable_audio_int(intelhaddata, false);
Takashi Iwai372d8552017-01-31 13:57:58 +01001435 return 0;
1436}
1437
1438/*
1439 * hdmi_lpe_audio_resume - power management resume function
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001440 * @pdev: platform device
Takashi Iwai372d8552017-01-31 13:57:58 +01001441 *
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001442 * This function is called to resume the hdmi audio.
Takashi Iwai372d8552017-01-31 13:57:58 +01001443 */
1444static int hdmi_lpe_audio_resume(struct platform_device *pdev)
1445{
1446 struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
Takashi Iwai372d8552017-01-31 13:57:58 +01001447
Takashi Iwaibcce7752017-02-01 17:18:20 +01001448 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001449 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001450 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwaic75b0472017-01-31 15:49:15 +01001451 dev_dbg(intelhaddata->dev, "had not connected\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001452 return 0;
1453 }
1454
1455 if (intelhaddata->drv_status != HAD_DRV_SUSPENDED) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001456 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwaicaa2a612017-01-31 16:38:22 +01001457 dev_dbg(intelhaddata->dev, "had is not in suspended state\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001458 return 0;
1459 }
1460
Takashi Iwai372d8552017-01-31 13:57:58 +01001461 intelhaddata->drv_status = HAD_DRV_CONNECTED;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001462 dev_dbg(intelhaddata->dev,
1463 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001464 __func__, __LINE__);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001465 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001466 snd_intelhad_enable_audio_int(intelhaddata, true);
Takashi Iwai372d8552017-01-31 13:57:58 +01001467 return 0;
1468}
1469
1470static inline int had_chk_intrmiss(struct snd_intelhad *intelhaddata,
1471 enum intel_had_aud_buf_type buf_id)
1472{
1473 int i, intr_count = 0;
1474 enum intel_had_aud_buf_type buff_done;
1475 u32 buf_size, buf_addr;
1476 struct had_stream_data *had_stream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001477
1478 had_stream = &intelhaddata->stream_data;
1479
1480 buff_done = buf_id;
1481
1482 intr_count = snd_intelhad_read_len(intelhaddata);
1483 if (intr_count > 1) {
1484 /* In case of active playback */
Takashi Iwaic75b0472017-01-31 15:49:15 +01001485 dev_err(intelhaddata->dev,
1486 "Driver detected %d missed buffer done interrupt(s)\n",
1487 (intr_count - 1));
Takashi Iwai372d8552017-01-31 13:57:58 +01001488 if (intr_count > 3)
1489 return intr_count;
1490
1491 buf_id += (intr_count - 1);
1492 /* Reprogram registers*/
1493 for (i = buff_done; i < buf_id; i++) {
1494 int j = i % 4;
1495
1496 buf_size = intelhaddata->buf_info[j].buf_size;
1497 buf_addr = intelhaddata->buf_info[j].buf_addr;
1498 had_write_register(intelhaddata,
1499 AUD_BUF_A_LENGTH +
1500 (j * HAD_REG_WIDTH), buf_size);
1501 had_write_register(intelhaddata,
1502 AUD_BUF_A_ADDR+(j * HAD_REG_WIDTH),
1503 (buf_addr | BIT(0) | BIT(1)));
1504 }
1505 buf_id = buf_id % 4;
Takashi Iwai372d8552017-01-31 13:57:58 +01001506 intelhaddata->buff_done = buf_id;
Takashi Iwai372d8552017-01-31 13:57:58 +01001507 }
1508
1509 return intr_count;
1510}
1511
Takashi Iwaibcce7752017-02-01 17:18:20 +01001512/* called from irq handler */
Takashi Iwai372d8552017-01-31 13:57:58 +01001513static int had_process_buffer_done(struct snd_intelhad *intelhaddata)
1514{
1515 u32 len = 1;
1516 enum intel_had_aud_buf_type buf_id;
1517 enum intel_had_aud_buf_type buff_done;
1518 struct pcm_stream_info *stream;
1519 u32 buf_size;
1520 struct had_stream_data *had_stream;
1521 int intr_count;
1522 enum had_status_stream stream_type;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001523 unsigned long flags;
Takashi Iwai372d8552017-01-31 13:57:58 +01001524
1525 had_stream = &intelhaddata->stream_data;
1526 stream = &intelhaddata->stream_info;
1527 intr_count = 1;
1528
Takashi Iwaibcce7752017-02-01 17:18:20 +01001529 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
Takashi Iwai372d8552017-01-31 13:57:58 +01001530 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001531 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
Takashi Iwaic75b0472017-01-31 15:49:15 +01001532 dev_dbg(intelhaddata->dev,
1533 "%s:Device already disconnected\n", __func__);
Takashi Iwai372d8552017-01-31 13:57:58 +01001534 return 0;
1535 }
1536 buf_id = intelhaddata->curr_buf;
1537 intelhaddata->buff_done = buf_id;
1538 buff_done = intelhaddata->buff_done;
1539 buf_size = intelhaddata->buf_info[buf_id].buf_size;
1540 stream_type = had_stream->stream_type;
1541
Takashi Iwai372d8552017-01-31 13:57:58 +01001542 /* Every debug statement has an implication
1543 * of ~5msec. Thus, avoid having >3 debug statements
1544 * for each buffer_done handling.
1545 */
1546
1547 /* Check for any intr_miss in case of active playback */
1548 if (had_stream->stream_type == HAD_RUNNING_STREAM) {
Takashi Iwai372d8552017-01-31 13:57:58 +01001549 intr_count = had_chk_intrmiss(intelhaddata, buf_id);
1550 if (!intr_count || (intr_count > 3)) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001551 spin_unlock_irqrestore(&intelhaddata->had_spinlock,
1552 flags);
Takashi Iwaic75b0472017-01-31 15:49:15 +01001553 dev_err(intelhaddata->dev,
1554 "HAD SW state in non-recoverable mode\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001555 return 0;
1556 }
1557 buf_id += (intr_count - 1);
1558 buf_id = buf_id % 4;
Takashi Iwai372d8552017-01-31 13:57:58 +01001559 }
1560
1561 intelhaddata->buf_info[buf_id].is_valid = true;
1562 if (intelhaddata->valid_buf_cnt-1 == buf_id) {
1563 if (had_stream->stream_type >= HAD_RUNNING_STREAM)
1564 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1565 } else
1566 intelhaddata->curr_buf = buf_id + 1;
1567
Takashi Iwaibcce7752017-02-01 17:18:20 +01001568 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
Takashi Iwai372d8552017-01-31 13:57:58 +01001569
Takashi Iwai79f439e2017-01-31 16:46:44 +01001570 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001571 dev_dbg(intelhaddata->dev, "HDMI cable plugged-out\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001572 return 0;
1573 }
1574
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001575 /* Reprogram the registers with addr and length */
Takashi Iwai372d8552017-01-31 13:57:58 +01001576 had_write_register(intelhaddata,
1577 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1578 buf_size);
1579 had_write_register(intelhaddata,
1580 AUD_BUF_A_ADDR + (buf_id * HAD_REG_WIDTH),
1581 intelhaddata->buf_info[buf_id].buf_addr |
1582 BIT(0) | BIT(1));
1583
1584 had_read_register(intelhaddata,
1585 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1586 &len);
Takashi Iwaic75b0472017-01-31 15:49:15 +01001587 dev_dbg(intelhaddata->dev, "%s:Enabled buf[%d]\n", __func__, buf_id);
Takashi Iwai372d8552017-01-31 13:57:58 +01001588
1589 /* In case of actual data,
1590 * report buffer_done to above ALSA layer
1591 */
Takashi Iwaidf76df12017-01-31 16:04:10 +01001592 buf_size = intelhaddata->buf_info[buf_id].buf_size;
Takashi Iwai372d8552017-01-31 13:57:58 +01001593 if (stream_type >= HAD_RUNNING_STREAM) {
1594 intelhaddata->stream_info.buffer_rendered +=
1595 (intr_count * buf_size);
Takashi Iwaidf76df12017-01-31 16:04:10 +01001596 had_period_elapsed(stream->had_substream);
Takashi Iwai372d8552017-01-31 13:57:58 +01001597 }
1598
1599 return 0;
1600}
1601
Takashi Iwaibcce7752017-02-01 17:18:20 +01001602/* called from irq handler */
Takashi Iwai372d8552017-01-31 13:57:58 +01001603static int had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
1604{
1605 enum intel_had_aud_buf_type buf_id;
1606 struct pcm_stream_info *stream;
1607 struct had_stream_data *had_stream;
1608 enum had_status_stream stream_type;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001609 unsigned long flags;
Takashi Iwai372d8552017-01-31 13:57:58 +01001610 int drv_status;
1611
1612 had_stream = &intelhaddata->stream_data;
1613 stream = &intelhaddata->stream_info;
1614
Takashi Iwaibcce7752017-02-01 17:18:20 +01001615 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
Takashi Iwai372d8552017-01-31 13:57:58 +01001616 buf_id = intelhaddata->curr_buf;
1617 stream_type = had_stream->stream_type;
1618 intelhaddata->buff_done = buf_id;
1619 drv_status = intelhaddata->drv_status;
1620 if (stream_type == HAD_RUNNING_STREAM)
1621 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1622
Takashi Iwaibcce7752017-02-01 17:18:20 +01001623 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
Takashi Iwai372d8552017-01-31 13:57:58 +01001624
Takashi Iwaic75b0472017-01-31 15:49:15 +01001625 dev_dbg(intelhaddata->dev, "Enter:%s buf_id=%d, stream_type=%d\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001626 __func__, buf_id, stream_type);
1627
1628 snd_intelhad_handle_underrun(intelhaddata);
1629
1630 if (drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001631 dev_dbg(intelhaddata->dev,
1632 "%s:Device already disconnected\n", __func__);
Takashi Iwai372d8552017-01-31 13:57:58 +01001633 return 0;
1634 }
1635
1636 if (stream_type == HAD_RUNNING_STREAM) {
1637 /* Report UNDERRUN error to above layers */
Takashi Iwaie9d65ab2017-01-31 16:11:27 +01001638 intelhaddata->flag_underrun = true;
Takashi Iwaidf76df12017-01-31 16:04:10 +01001639 had_period_elapsed(stream->had_substream);
Takashi Iwai372d8552017-01-31 13:57:58 +01001640 }
1641
1642 return 0;
1643}
1644
Takashi Iwaibcce7752017-02-01 17:18:20 +01001645/* process hot plug, called from wq */
Takashi Iwai372d8552017-01-31 13:57:58 +01001646static int had_process_hot_plug(struct snd_intelhad *intelhaddata)
1647{
1648 enum intel_had_aud_buf_type buf_id;
1649 struct snd_pcm_substream *substream;
1650 struct had_stream_data *had_stream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001651
Takashi Iwai372d8552017-01-31 13:57:58 +01001652 substream = intelhaddata->stream_info.had_substream;
1653 had_stream = &intelhaddata->stream_data;
1654
Takashi Iwaibcce7752017-02-01 17:18:20 +01001655 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001656 if (intelhaddata->drv_status == HAD_DRV_CONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001657 dev_dbg(intelhaddata->dev, "Device already connected\n");
Takashi Iwaibcce7752017-02-01 17:18:20 +01001658 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001659 return 0;
1660 }
1661 buf_id = intelhaddata->curr_buf;
1662 intelhaddata->buff_done = buf_id;
1663 intelhaddata->drv_status = HAD_DRV_CONNECTED;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001664 dev_dbg(intelhaddata->dev,
1665 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001666 __func__, __LINE__);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001667 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001668
Takashi Iwaic75b0472017-01-31 15:49:15 +01001669 dev_dbg(intelhaddata->dev, "Processing HOT_PLUG, buf_id = %d\n",
1670 buf_id);
Takashi Iwai372d8552017-01-31 13:57:58 +01001671
1672 /* Safety check */
1673 if (substream) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001674 dev_dbg(intelhaddata->dev,
1675 "Force to stop the active stream by disconnection\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001676 /* Set runtime->state to hw_params done */
1677 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1678 }
1679
1680 had_build_channel_allocation_map(intelhaddata);
1681
1682 return 0;
1683}
1684
Takashi Iwaibcce7752017-02-01 17:18:20 +01001685/* process hot unplug, called from wq */
Takashi Iwai372d8552017-01-31 13:57:58 +01001686static int had_process_hot_unplug(struct snd_intelhad *intelhaddata)
1687{
1688 enum intel_had_aud_buf_type buf_id;
1689 struct had_stream_data *had_stream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001690
Takashi Iwai372d8552017-01-31 13:57:58 +01001691 had_stream = &intelhaddata->stream_data;
1692 buf_id = intelhaddata->curr_buf;
1693
Takashi Iwaibcce7752017-02-01 17:18:20 +01001694 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001695
1696 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001697 dev_dbg(intelhaddata->dev, "Device already disconnected\n");
Takashi Iwaibcce7752017-02-01 17:18:20 +01001698 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001699 return 0;
1700
1701 } else {
1702 /* Disable Audio */
1703 snd_intelhad_enable_audio_int(intelhaddata, false);
1704 snd_intelhad_enable_audio(intelhaddata, false);
1705 }
1706
1707 intelhaddata->drv_status = HAD_DRV_DISCONNECTED;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001708 dev_dbg(intelhaddata->dev,
1709 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001710 __func__, __LINE__);
1711
1712 /* Report to above ALSA layer */
1713 if (intelhaddata->stream_info.had_substream != NULL) {
Takashi Iwaibcce7752017-02-01 17:18:20 +01001714 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001715 snd_pcm_stop(intelhaddata->stream_info.had_substream,
1716 SNDRV_PCM_STATE_SETUP);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001717 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001718 }
1719
1720 had_stream->stream_type = HAD_INIT;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001721 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001722 kfree(intelhaddata->chmap->chmap);
1723 intelhaddata->chmap->chmap = NULL;
Takashi Iwai372d8552017-01-31 13:57:58 +01001724
1725 return 0;
1726}
1727
1728/* PCM operations structure and the calls back for the same */
1729static struct snd_pcm_ops snd_intelhad_playback_ops = {
Jerome Anand5dab11d2017-01-25 04:27:52 +05301730 .open = snd_intelhad_open,
1731 .close = snd_intelhad_close,
1732 .ioctl = snd_pcm_lib_ioctl,
1733 .hw_params = snd_intelhad_hw_params,
1734 .hw_free = snd_intelhad_hw_free,
1735 .prepare = snd_intelhad_pcm_prepare,
1736 .trigger = snd_intelhad_pcm_trigger,
1737 .pointer = snd_intelhad_pcm_pointer,
1738 .mmap = snd_intelhad_pcm_mmap,
1739};
1740
Jerome Anand5dab11d2017-01-25 04:27:52 +05301741static int had_iec958_info(struct snd_kcontrol *kcontrol,
1742 struct snd_ctl_elem_info *uinfo)
1743{
1744 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1745 uinfo->count = 1;
1746 return 0;
1747}
1748
1749static int had_iec958_get(struct snd_kcontrol *kcontrol,
1750 struct snd_ctl_elem_value *ucontrol)
1751{
1752 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1753
1754 ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1755 ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1756 ucontrol->value.iec958.status[2] =
1757 (intelhaddata->aes_bits >> 16) & 0xff;
1758 ucontrol->value.iec958.status[3] =
1759 (intelhaddata->aes_bits >> 24) & 0xff;
1760 return 0;
1761}
Takashi Iwai372d8552017-01-31 13:57:58 +01001762
Jerome Anand5dab11d2017-01-25 04:27:52 +05301763static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1764 struct snd_ctl_elem_value *ucontrol)
1765{
1766 ucontrol->value.iec958.status[0] = 0xff;
1767 ucontrol->value.iec958.status[1] = 0xff;
1768 ucontrol->value.iec958.status[2] = 0xff;
1769 ucontrol->value.iec958.status[3] = 0xff;
1770 return 0;
1771}
Takashi Iwai372d8552017-01-31 13:57:58 +01001772
Jerome Anand5dab11d2017-01-25 04:27:52 +05301773static int had_iec958_put(struct snd_kcontrol *kcontrol,
1774 struct snd_ctl_elem_value *ucontrol)
1775{
1776 unsigned int val;
1777 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1778
Jerome Anand5dab11d2017-01-25 04:27:52 +05301779 val = (ucontrol->value.iec958.status[0] << 0) |
1780 (ucontrol->value.iec958.status[1] << 8) |
1781 (ucontrol->value.iec958.status[2] << 16) |
1782 (ucontrol->value.iec958.status[3] << 24);
1783 if (intelhaddata->aes_bits != val) {
1784 intelhaddata->aes_bits = val;
1785 return 1;
1786 }
1787 return 1;
1788}
1789
1790static struct snd_kcontrol_new had_control_iec958_mask = {
1791 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1792 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1793 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1794 .info = had_iec958_info, /* shared */
1795 .get = had_iec958_mask_get,
1796};
1797
1798static struct snd_kcontrol_new had_control_iec958 = {
1799 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1800 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1801 .info = had_iec958_info,
1802 .get = had_iec958_get,
1803 .put = had_iec958_put
1804};
1805
Takashi Iwaida864802017-01-31 13:52:22 +01001806static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1807{
1808 struct snd_intelhad *ctx = dev_id;
1809 u32 audio_stat, audio_reg;
1810
Takashi Iwai4151ee82017-01-31 18:14:15 +01001811 audio_reg = AUD_HDMI_STATUS;
Takashi Iwaida864802017-01-31 13:52:22 +01001812 mid_hdmi_audio_read(ctx, audio_reg, &audio_stat);
1813
1814 if (audio_stat & HDMI_AUDIO_UNDERRUN) {
1815 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
1816 had_process_buffer_underrun(ctx);
1817 }
1818
1819 if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
1820 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
1821 had_process_buffer_done(ctx);
1822 }
1823
1824 return IRQ_HANDLED;
1825}
1826
1827static void notify_audio_lpe(struct platform_device *pdev)
1828{
1829 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
Takashi Iwaida864802017-01-31 13:52:22 +01001830
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001831 schedule_work(&ctx->hdmi_audio_wq);
1832}
Takashi Iwaida864802017-01-31 13:52:22 +01001833
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001834static void had_audio_wq(struct work_struct *work)
1835{
1836 struct snd_intelhad *ctx =
1837 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1838 struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
1839
1840 if (!pdata->hdmi_connected) {
1841 dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001842 __func__);
1843
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001844 if (ctx->state != hdmi_connector_status_connected) {
1845 dev_dbg(ctx->dev, "%s: Already Unplugged!\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001846 __func__);
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001847 return;
1848 }
1849
1850 ctx->state = hdmi_connector_status_disconnected;
1851 had_process_hot_unplug(ctx);
Takashi Iwaida864802017-01-31 13:52:22 +01001852
1853 } else {
1854 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1855
1856 switch (eld->pipe_id) {
1857 case 0:
1858 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1859 break;
1860 case 1:
1861 ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1862 break;
1863 case 2:
1864 ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1865 break;
1866 default:
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001867 dev_dbg(ctx->dev, "Invalid pipe %d\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001868 eld->pipe_id);
1869 break;
1870 }
1871
1872 memcpy(&ctx->eld, eld->eld_data, sizeof(ctx->eld));
1873
1874 had_process_hot_plug(ctx);
1875
1876 ctx->state = hdmi_connector_status_connected;
1877
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001878 dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001879 __func__, eld->port_id, pdata->tmds_clock_speed);
1880
1881 if (pdata->tmds_clock_speed) {
1882 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1883 ctx->dp_output = pdata->dp_output;
1884 ctx->link_rate = pdata->link_rate;
1885
1886 /* Process mode change if stream is active */
1887 if (ctx->stream_data.stream_type == HAD_RUNNING_STREAM)
1888 hdmi_audio_mode_change(ctx);
1889 }
1890 }
1891}
1892
1893/* release resources */
1894static void hdmi_lpe_audio_free(struct snd_card *card)
1895{
1896 struct snd_intelhad *ctx = card->private_data;
1897
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001898 cancel_work_sync(&ctx->hdmi_audio_wq);
1899
Takashi Iwaida864802017-01-31 13:52:22 +01001900 if (ctx->mmio_start)
1901 iounmap(ctx->mmio_start);
1902 if (ctx->irq >= 0)
1903 free_irq(ctx->irq, ctx);
1904}
1905
1906/*
1907 * hdmi_lpe_audio_probe - start bridge with i915
1908 *
1909 * This function is called when the i915 driver creates the
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001910 * hdmi-lpe-audio platform device.
Takashi Iwaida864802017-01-31 13:52:22 +01001911 */
1912static int hdmi_lpe_audio_probe(struct platform_device *pdev)
1913{
1914 struct snd_card *card;
1915 struct snd_intelhad *ctx;
1916 struct snd_pcm *pcm;
1917 struct intel_hdmi_lpe_audio_pdata *pdata;
1918 int irq;
1919 struct resource *res_mmio;
1920 int ret;
Takashi Iwaida864802017-01-31 13:52:22 +01001921
Takashi Iwaida864802017-01-31 13:52:22 +01001922 dev_dbg(&pdev->dev, "dma_mask: %p\n", pdev->dev.dma_mask);
1923
1924 pdata = pdev->dev.platform_data;
1925 if (!pdata) {
1926 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
1927 return -EINVAL;
1928 }
1929
1930 /* get resources */
1931 irq = platform_get_irq(pdev, 0);
1932 if (irq < 0) {
1933 dev_err(&pdev->dev, "Could not get irq resource\n");
1934 return -ENODEV;
1935 }
1936
1937 res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1938 if (!res_mmio) {
1939 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
1940 return -ENXIO;
1941 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301942
Takashi Iwai5647aec2017-01-31 08:14:34 +01001943 /* create a card instance with ALSA framework */
Takashi Iwaida864802017-01-31 13:52:22 +01001944 ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
1945 THIS_MODULE, sizeof(*ctx), &card);
1946 if (ret)
1947 return ret;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301948
Takashi Iwaida864802017-01-31 13:52:22 +01001949 ctx = card->private_data;
1950 spin_lock_init(&ctx->had_spinlock);
1951 ctx->drv_status = HAD_DRV_DISCONNECTED;
1952 ctx->dev = &pdev->dev;
1953 ctx->card = card;
Takashi Iwaie9d65ab2017-01-31 16:11:27 +01001954 ctx->flag_underrun = false;
Takashi Iwaida864802017-01-31 13:52:22 +01001955 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1956 strcpy(card->driver, INTEL_HAD);
1957 strcpy(card->shortname, INTEL_HAD);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301958
Takashi Iwaida864802017-01-31 13:52:22 +01001959 ctx->irq = -1;
1960 ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001961 INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq);
Takashi Iwaida864802017-01-31 13:52:22 +01001962 ctx->state = hdmi_connector_status_disconnected;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301963
Takashi Iwaida864802017-01-31 13:52:22 +01001964 card->private_free = hdmi_lpe_audio_free;
1965
1966 /* assume pipe A as default */
1967 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1968
1969 platform_set_drvdata(pdev, ctx);
1970
1971 dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
1972 __func__, (unsigned int)res_mmio->start,
1973 (unsigned int)res_mmio->end);
1974
1975 ctx->mmio_start = ioremap_nocache(res_mmio->start,
1976 (size_t)(resource_size(res_mmio)));
1977 if (!ctx->mmio_start) {
1978 dev_err(&pdev->dev, "Could not get ioremap\n");
1979 ret = -EACCES;
1980 goto err;
1981 }
1982
1983 /* setup interrupt handler */
1984 ret = request_irq(irq, display_pipe_interrupt_handler, 0,
1985 pdev->name, ctx);
1986 if (ret < 0) {
1987 dev_err(&pdev->dev, "request_irq failed\n");
1988 goto err;
1989 }
1990
1991 ctx->irq = irq;
1992
1993 ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
1994 MAX_CAP_STREAMS, &pcm);
1995 if (ret)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301996 goto err;
1997
1998 /* setup private data which can be retrieved when required */
Takashi Iwaida864802017-01-31 13:52:22 +01001999 pcm->private_data = ctx;
Jerome Anand5dab11d2017-01-25 04:27:52 +05302000 pcm->info_flags = 0;
2001 strncpy(pcm->name, card->shortname, strlen(card->shortname));
Takashi Iwaida864802017-01-31 13:52:22 +01002002 /* setup the ops for playabck */
Jerome Anand5dab11d2017-01-25 04:27:52 +05302003 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
2004 &snd_intelhad_playback_ops);
2005 /* allocate dma pages for ALSA stream operations
2006 * memory allocated is based on size, not max value
2007 * thus using same argument for max & size
2008 */
Takashi Iwaida864802017-01-31 13:52:22 +01002009 snd_pcm_lib_preallocate_pages_for_all(pcm,
Jerome Anand5dab11d2017-01-25 04:27:52 +05302010 SNDRV_DMA_TYPE_DEV, NULL,
2011 HAD_MAX_BUFFER, HAD_MAX_BUFFER);
Jerome Anand5dab11d2017-01-25 04:27:52 +05302012
Jerome Anand5dab11d2017-01-25 04:27:52 +05302013 /* IEC958 controls */
Takashi Iwaida864802017-01-31 13:52:22 +01002014 ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask, ctx));
2015 if (ret < 0)
Jerome Anand5dab11d2017-01-25 04:27:52 +05302016 goto err;
Takashi Iwaida864802017-01-31 13:52:22 +01002017 ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958, ctx));
2018 if (ret < 0)
Jerome Anand5dab11d2017-01-25 04:27:52 +05302019 goto err;
2020
2021 init_channel_allocations();
2022
2023 /* Register channel map controls */
Takashi Iwaida864802017-01-31 13:52:22 +01002024 ret = had_register_chmap_ctls(ctx, pcm);
2025 if (ret < 0)
Jerome Anand5dab11d2017-01-25 04:27:52 +05302026 goto err;
2027
Takashi Iwaida864802017-01-31 13:52:22 +01002028 ret = snd_card_register(card);
2029 if (ret)
Takashi Iwai36ec0d92017-01-31 08:47:05 +01002030 goto err;
2031
Takashi Iwaibcce7752017-02-01 17:18:20 +01002032 spin_lock_irq(&pdata->lpe_audio_slock);
Takashi Iwaida864802017-01-31 13:52:22 +01002033 pdata->notify_audio_lpe = notify_audio_lpe;
Takashi Iwai99b2ab92017-01-31 16:26:10 +01002034 pdata->notify_pending = false;
Takashi Iwaibcce7752017-02-01 17:18:20 +01002035 spin_unlock_irq(&pdata->lpe_audio_slock);
Takashi Iwaida864802017-01-31 13:52:22 +01002036
2037 pm_runtime_set_active(&pdev->dev);
2038 pm_runtime_enable(&pdev->dev);
2039
Takashi Iwai99b2ab92017-01-31 16:26:10 +01002040 dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
Takashi Iwaida864802017-01-31 13:52:22 +01002041 schedule_work(&ctx->hdmi_audio_wq);
Jerome Anand5dab11d2017-01-25 04:27:52 +05302042
Takashi Iwai79dda752017-01-30 17:23:39 +01002043 return 0;
Takashi Iwai5647aec2017-01-31 08:14:34 +01002044
Jerome Anand5dab11d2017-01-25 04:27:52 +05302045err:
2046 snd_card_free(card);
Takashi Iwaida864802017-01-31 13:52:22 +01002047 return ret;
Jerome Anand5dab11d2017-01-25 04:27:52 +05302048}
2049
Takashi Iwai79dda752017-01-30 17:23:39 +01002050/*
Takashi Iwaida864802017-01-31 13:52:22 +01002051 * hdmi_lpe_audio_remove - stop bridge with i915
Jerome Anand5dab11d2017-01-25 04:27:52 +05302052 *
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01002053 * This function is called when the platform device is destroyed.
Jerome Anand5dab11d2017-01-25 04:27:52 +05302054 */
Takashi Iwaida864802017-01-31 13:52:22 +01002055static int hdmi_lpe_audio_remove(struct platform_device *pdev)
Jerome Anand5dab11d2017-01-25 04:27:52 +05302056{
Takashi Iwaida864802017-01-31 13:52:22 +01002057 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05302058
Takashi Iwaida864802017-01-31 13:52:22 +01002059 if (ctx->drv_status != HAD_DRV_DISCONNECTED)
2060 snd_intelhad_enable_audio_int(ctx, false);
2061 snd_card_free(ctx->card);
Jerome Anand5dab11d2017-01-25 04:27:52 +05302062 return 0;
2063}
2064
Takashi Iwaida864802017-01-31 13:52:22 +01002065static struct platform_driver hdmi_lpe_audio_driver = {
2066 .driver = {
2067 .name = "hdmi-lpe-audio",
2068 },
2069 .probe = hdmi_lpe_audio_probe,
2070 .remove = hdmi_lpe_audio_remove,
2071 .suspend = hdmi_lpe_audio_suspend,
2072 .resume = hdmi_lpe_audio_resume
2073};
2074
2075module_platform_driver(hdmi_lpe_audio_driver);
2076MODULE_ALIAS("platform:hdmi_lpe_audio");
2077
Jerome Anand5dab11d2017-01-25 04:27:52 +05302078MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
2079MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
2080MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
2081MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
2082MODULE_DESCRIPTION("Intel HDMI Audio driver");
2083MODULE_LICENSE("GPL v2");
2084MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");