| [ |
| { |
| "BriefDescription": "pclk Cycles", |
| "Counter": "0,1,2,3", |
| "EventName": "UNC_P_CLOCKTICKS", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x60", |
| "EventName": "UNC_P_CORE_TRANSITION_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "UNC_P_DEMOTIONS", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x30", |
| "EventName": "UNC_P_DEMOTIONS", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Phase Shed 0 Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x75", |
| "EventName": "UNC_P_FIVR_PS_PS0_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Phase Shed 1 Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x76", |
| "EventName": "UNC_P_FIVR_PS_PS1_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Phase Shed 2 Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x77", |
| "EventName": "UNC_P_FIVR_PS_PS2_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Phase Shed 3 Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x78", |
| "EventName": "UNC_P_FIVR_PS_PS3_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Thermal Strongest Upper Limit Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x4", |
| "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Power Strongest Upper Limit Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x5", |
| "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "IO P Limit Strongest Lower Limit Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x73", |
| "EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Cycles spent changing Frequency", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x74", |
| "EventName": "UNC_P_FREQ_TRANS_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "UNC_P_MCP_PROCHOT_CYCLES", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x6", |
| "EventName": "UNC_P_MCP_PROCHOT_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Memory Phase Shedding Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2F", |
| "EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Package C State Residency - C0", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2A", |
| "EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Package C State Residency - C2E", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2B", |
| "EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Package C State Residency - C3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2C", |
| "EventName": "UNC_P_PKG_RESIDENCY_C3_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Package C State Residency - C6", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x2D", |
| "EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "UNC_P_PMAX_THROTTLED_CYCLES", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x7", |
| "EventName": "UNC_P_PMAX_THROTTLED_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Number of cores in C-State; C0 and C1", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x80", |
| "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Number of cores in C-State; C3", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x80", |
| "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Number of cores in C-State; C6 and C7", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x80", |
| "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "External Prochot", |
| "Counter": "0,1,2,3", |
| "EventCode": "0xA", |
| "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Internal Prochot", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x9", |
| "EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "Total Core C State Transition Cycles", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x72", |
| "EventName": "UNC_P_TOTAL_TRANSITION_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| }, |
| { |
| "BriefDescription": "VR Hot", |
| "Counter": "0,1,2,3", |
| "EventCode": "0x42", |
| "EventName": "UNC_P_VR_HOT_CYCLES", |
| "PerPkg": "1", |
| "Unit": "PCU" |
| } |
| ] |
