| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pci/qcom,sa8255p-pcie-ep.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm firmware managed PCIe Endpoint Controller |
| |
| description: |
| Qualcomm SA8255p SoC PCIe endpoint controller is based on the Synopsys |
| DesignWare PCIe IP which is managed by firmware. |
| |
| maintainers: |
| - Manivannan Sadhasivam <mani@kernel.org> |
| |
| properties: |
| compatible: |
| const: qcom,sa8255p-pcie-ep |
| |
| reg: |
| items: |
| - description: Qualcomm-specific PARF configuration registers |
| - description: DesignWare PCIe registers |
| - description: External local bus interface registers |
| - description: Address Translation Unit (ATU) registers |
| - description: Memory region used to map remote RC address space |
| - description: BAR memory region |
| - description: DMA register space |
| |
| reg-names: |
| items: |
| - const: parf |
| - const: dbi |
| - const: elbi |
| - const: atu |
| - const: addr_space |
| - const: mmio |
| - const: dma |
| |
| interrupts: |
| items: |
| - description: PCIe Global interrupt |
| - description: PCIe Doorbell interrupt |
| - description: DMA interrupt |
| |
| interrupt-names: |
| items: |
| - const: global |
| - const: doorbell |
| - const: dma |
| |
| iommus: |
| maxItems: 1 |
| |
| reset-gpios: |
| description: GPIO used as PERST# input signal |
| maxItems: 1 |
| |
| wake-gpios: |
| description: GPIO used as WAKE# output signal |
| maxItems: 1 |
| |
| power-domains: |
| maxItems: 1 |
| |
| dma-coherent: true |
| |
| num-lanes: |
| default: 2 |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - interrupts |
| - interrupt-names |
| - reset-gpios |
| - power-domains |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| soc { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| pcie1_ep: pcie-ep@1c10000 { |
| compatible = "qcom,sa8255p-pcie-ep"; |
| reg = <0x0 0x01c10000 0x0 0x3000>, |
| <0x0 0x60000000 0x0 0xf20>, |
| <0x0 0x60000f20 0x0 0xa8>, |
| <0x0 0x60001000 0x0 0x4000>, |
| <0x0 0x60200000 0x0 0x100000>, |
| <0x0 0x01c13000 0x0 0x1000>, |
| <0x0 0x60005000 0x0 0x2000>; |
| reg-names = "parf", "dbi", "elbi", "atu", "addr_space", "mmio", "dma"; |
| interrupts = <GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "global", "doorbell", "dma"; |
| reset-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; |
| dma-coherent; |
| iommus = <&pcie_smmu 0x80 0x7f>; |
| power-domains = <&scmi6_pd 1>; |
| num-lanes = <4>; |
| }; |
| }; |
