Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/google,gs101-otp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Google GS101 OTP Controller

maintainers:
  - Tudor Ambarus <tudor.ambarus@linaro.org>

description: |
  OTP controller drives a NVMEM memory where system or user specific data
  can be stored. The OTP controller register space is of interest as well
  because it contains dedicated registers where it stores the Product ID
  and the Chip ID (apart other things like TMU or ASV info).

allOf:
  - $ref: nvmem.yaml#

properties:
  compatible:
    items:
      - const: google,gs101-otp

  clocks:
    maxItems: 1

  clock-names:
    const: pclk

  interrupts:
    maxItems: 1

  reg:
    maxItems: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - interrupts

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/google,gs101.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    efuse@10000000 {
        compatible = "google,gs101-otp";
        reg = <0x10000000 0xf084>;
        clocks = <&cmu_misc CLK_GOUT_MISC_OTP_CON_TOP_PCLK>;
        clock-names = "pclk";
        interrupts = <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH>;
    };