blob: 1b35e4cbd04908a005010deebd60cbd66b677839 [file] [edit]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/nxp,netc-switch.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NETC Switch family
description: >
The NETC presents itself as a multi-function PCIe Root Complex Integrated
Endpoint (RCiEP) and provides full 802.1Q Ethernet switch functionality,
advanced QoS with 8 traffic classes and 4 drop resilience levels, and a
full range of TSN standards capabilities.
The CPU port of the switch connects to an internal ENETC. The switch and
the internal ENETC are fully integrated into the NETC IP, a back-to-back
MAC is not required. Instead, a light-weight "pseudo MAC" provides the
delineation between the switch and ENETC. This translates to lower power
(less logic and memory) and lower delay (as there is no serialization
delay across this link).
maintainers:
- Wei Fang <wei.fang@nxp.com>
properties:
compatible:
enum:
- pci1131,eef2
reg:
maxItems: 1
dsa,member:
description: >
The property indicates DSA cluster and switch index. For NETC switch,
the valid range of the switch index is 1 ~ 7, the index is reflected
in the switch tag as an indication of the switch ID where the frame
originated. The value 0 is reserved for ENETC VEPA switch, whose ID
is hardwired to zero.
items:
- true
- minimum: 1
maximum: 7
ethernet-ports:
type: object
patternProperties:
"^ethernet-port@[0-9a-f]$":
type: object
$ref: dsa-port.yaml#
properties:
clocks:
items:
- description: MAC transmit/receive reference clock.
clock-names:
items:
- const: ref
mdio:
$ref: /schemas/net/mdio.yaml#
unevaluatedProperties: false
description:
Optional child node for switch port, otherwise use NETC EMDIO.
unevaluatedProperties: false
required:
- compatible
- reg
- dsa,member
- ethernet-ports
allOf:
- $ref: /schemas/pci/pci-device.yaml
- $ref: dsa.yaml#
unevaluatedProperties: false
examples:
- |
pcie {
#address-cells = <3>;
#size-cells = <2>;
ethernet-switch@0,2 {
compatible = "pci1131,eef2";
reg = <0x200 0 0 0 0>;
dsa,member = <0 1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_switch>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
ethernet-port@0 {
reg = <0>;
phy-handle = <&ethphy0>;
phy-mode = "mii";
};
ethernet-port@1 {
reg = <1>;
phy-handle = <&ethphy1>;
phy-mode = "mii";
};
ethernet-port@2 {
reg = <2>;
clocks = <&scmi_clk 103>;
clock-names = "ref";
phy-handle = <&ethphy2>;
phy-mode = "rgmii-id";
};
ethernet-port@3 {
reg = <3>;
ethernet = <&enetc3>;
phy-mode = "internal";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};