| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NXP LPC32xx System Control Block |
| |
| maintainers: |
| - Vladimir Zapolskiy <vz@mleia.com> |
| |
| description: |
| NXP LPC32xx SoC series have a System Control Block, which serves for |
| a multitude of purposes including clock management, DMA muxes, storing |
| SoC unique ID etc. |
| |
| properties: |
| compatible: |
| items: |
| - enum: |
| - nxp,lpc3220-scb |
| - const: syscon |
| - const: simple-mfd |
| |
| reg: |
| maxItems: 1 |
| |
| ranges: true |
| |
| "#address-cells": |
| const: 1 |
| |
| "#size-cells": |
| const: 1 |
| |
| patternProperties: |
| "^clock-controller@[0-9a-f]+$": |
| $ref: /schemas/clock/nxp,lpc3220-clk.yaml# |
| |
| "^dma-router@[0-9a-f]+$": |
| $ref: /schemas/dma/nxp,lpc3220-dmamux.yaml# |
| |
| required: |
| - compatible |
| - reg |
| - "#address-cells" |
| - "#size-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| syscon@400040000 { |
| compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd"; |
| reg = <0x40004000 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0 0x40004000 0x1000>; |
| |
| clock-controller@0 { |
| compatible = "nxp,lpc3220-clk"; |
| reg = <0x0 0x114>; |
| clocks = <&xtal_32k>, <&xtal>; |
| clock-names = "xtal_32k", "xtal"; |
| #clock-cells = <1>; |
| }; |
| |
| dma-router@78 { |
| compatible = "nxp,lpc3220-dmamux"; |
| reg = <0x78 0x8>; |
| dma-masters = <&dma>; |
| #dma-cells = <3>; |
| }; |
| }; |
