| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/display/ti/ti,am625-oldi.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Texas Instruments AM625 OLDI Transmitter |
| |
| maintainers: |
| - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> |
| - Aradhya Bhatia <aradhya.bhatia@linux.dev> |
| |
| description: |
| The AM625 TI Keystone OpenLDI transmitter (OLDI TX) supports serialized RGB |
| pixel data transmission between host and flat panel display over LVDS (Low |
| Voltage Differential Sampling) interface. The OLDI TX consists of 7-to-1 data |
| serializers, and 4-data and 1-clock LVDS outputs. It supports the LVDS output |
| formats "jeida-18", "jeida-24" and "vesa-18", and can accept 24-bit RGB or |
| padded and un-padded 18-bit RGB bus formats as input. |
| |
| properties: |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| description: serial clock input for the OLDI transmitters |
| |
| clock-names: |
| const: serial |
| |
| ti,companion-oldi: |
| $ref: /schemas/types.yaml#/definitions/phandle |
| description: |
| phandle to companion OLDI transmitter. This property is required for both |
| the OLDI TXes if they are expected to work either in dual-lvds mode or in |
| clone mode. This property should point to the other OLDI TX's phandle. |
| |
| ti,secondary-oldi: |
| type: boolean |
| description: |
| Boolean property to mark the OLDI transmitter as the secondary one, when the |
| OLDI hardware is expected to run as a companion HW, in cases of dual-lvds |
| mode or clone mode. The primary OLDI hardware is responsible for all the |
| hardware configuration. |
| |
| ti,oldi-io-ctrl: |
| $ref: /schemas/types.yaml#/definitions/phandle |
| description: |
| phandle to syscon device node mapping OLDI IO_CTRL registers found in the |
| control MMR region. These registers are required to toggle the I/O lane |
| power, and control its electrical characteristics. |
| |
| ports: |
| $ref: /schemas/graph.yaml#/properties/ports |
| |
| properties: |
| port@0: |
| $ref: /schemas/graph.yaml#/properties/port |
| description: Parallel RGB input port |
| |
| port@1: |
| $ref: /schemas/graph.yaml#/properties/port |
| description: LVDS output port |
| |
| required: |
| - port@0 |
| - port@1 |
| |
| required: |
| - reg |
| - clocks |
| - clock-names |
| - ti,oldi-io-ctrl |
| - ports |
| |
| additionalProperties: false |
| |
| ... |