Documentation/devicetree/bindings/clock/qcom,nord-nwgcc.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,nord-nwgcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Global North West and South East  Clock & Reset Controller
       on Nord SoC

maintainers:
  - Taniya Das <taniya.das@oss.qualcomm.com>

description: |
  Qualcomm global clock control (NW, SE) module provides the clocks, resets
  and power domains on Nord SoC.

  See also:
    include/dt-bindings/clock/qcom,nord-nwgcc.h
    include/dt-bindings/clock/qcom,nord-segcc.h

properties:
  compatible:
    enum:
      - qcom,nord-nwgcc
      - qcom,nord-segcc

  clocks:
    items:
      - description: Board XO source
      - description: Sleep clock source

required:
  - compatible
  - clocks
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>
    clock-controller@8b00000 {
      compatible = "qcom,nord-nwgcc";
      reg = <0x08b00000 0xf4200>;
      clocks = <&rpmhcc RPMH_CXO_CLK>,
               <&sleep_clk>;
      #clock-cells = <1>;
      #reset-cells = <1>;
      #power-domain-cells = <1>;
    };

...