Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale SAI bitclock-as-a-clock

maintainers:
  - Michael Walle <michael@walle.cc>

description: |
  It is possible to use the BCLK or MCLK pin of a SAI module as a generic
  clock output. Some SoC are very constrained in their pin multiplexer
  configuration. E.g. pins can only be changed in groups. For example, on
  the LS1028A SoC you can only enable SAIs in pairs. If you use only one SAI,
  the second pins are wasted. Using this binding it is possible to use the
  clock of the second SAI as a MCLK clock for an audio codec, for example.

  This is a composite of a gated clock and a divider clock.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - fsl,imx8mm-sai-clock
              - fsl,imx8mn-sai-clock
              - fsl,imx8mp-sai-clock
          - const: fsl,imx8mq-sai-clock
      - items:
          - enum:
              - fsl,imx8mq-sai-clock
              - fsl,vf610-sai-clock

  reg:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 2

  clock-names:
    minItems: 1
    items:
      - const: bus
      - const: mclk1

  '#clock-cells':
    maximum: 1

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: fsl,vf610-sai-clock
    then:
      properties:
        clocks:
          maxItems: 1
        clock-names: false

required:
  - compatible
  - reg
  - clocks
  - '#clock-cells'

additionalProperties: false

examples:
  - |
    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        mclk: clock-mclk@f130080 {
            compatible = "fsl,vf610-sai-clock";
            reg = <0x0 0xf130080 0x0 0x80>;
            #clock-cells = <0>;
            clocks = <&parentclk>;
        };
    };