| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Eswin EIC7700 SoC SATA Controller |
| |
| maintainers: |
| - Yulin Lu <luyulin@eswincomputing.com> |
| - Huan He <hehuan1@eswincomputing.com> |
| |
| description: |
| AHCI SATA controller embedded into the EIC7700 SoC is based on the DWC AHCI |
| SATA v5.00a IP core. |
| |
| select: |
| properties: |
| compatible: |
| const: eswin,eic7700-ahci |
| required: |
| - compatible |
| |
| allOf: |
| - $ref: snps,dwc-ahci-common.yaml# |
| |
| properties: |
| compatible: |
| items: |
| - const: eswin,eic7700-ahci |
| - const: snps,dwc-ahci |
| |
| clocks: |
| minItems: 2 |
| maxItems: 2 |
| |
| clock-names: |
| items: |
| - const: pclk |
| - const: aclk |
| |
| resets: |
| maxItems: 1 |
| |
| reset-names: |
| const: arst |
| |
| ports-implemented: |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - clock-names |
| - resets |
| - reset-names |
| - phys |
| - phy-names |
| - ports-implemented |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| sata@50420000 { |
| compatible = "eswin,eic7700-ahci", "snps,dwc-ahci"; |
| reg = <0x50420000 0x10000>; |
| interrupt-parent = <&plic>; |
| interrupts = <58>; |
| clocks = <&clock 171>, <&clock 186>; |
| clock-names = "pclk", "aclk"; |
| phys = <&sata_phy>; |
| phy-names = "sata-phy"; |
| ports-implemented = <0x1>; |
| resets = <&reset 96>; |
| reset-names = "arst"; |
| }; |
