Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp

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Secondary CPU enable-method "al,alpine-smp" binding
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This document describes the "al,alpine-smp" method for
enabling secondary CPUs. To apply to all CPUs, a single
"al,alpine-smp" enable method should be defined in the
"cpus" node.

Enable method name:	"al,alpine-smp"
Compatible machines:	"al,alpine"
Compatible CPUs:	"arm,cortex-a15"
Related properties:	(none)

Note:
This enable method requires valid nodes compatible with
"al,alpine-cpu-resume" and "al,alpine-nb-service".


* Alpine CPU resume registers

The CPU resume register are used to define required resume address after
reset.

Properties:
- compatible : Should contain "al,alpine-cpu-resume".
- reg : Offset and length of the register set for the device


Example:

cpus {
	#address-cells = <1>;
	#size-cells = <0>;
	enable-method = "al,alpine-smp";

	cpu@0 {
		compatible = "arm,cortex-a15";
		device_type = "cpu";
		reg = <0>;
	};

	cpu@1 {
		compatible = "arm,cortex-a15";
		device_type = "cpu";
		reg = <1>;
	};

	cpu@2 {
		compatible = "arm,cortex-a15";
		device_type = "cpu";
		reg = <2>;
	};

	cpu@3 {
		compatible = "arm,cortex-a15";
		device_type = "cpu";
		reg = <3>;
	};
};

cpu_resume {
	compatible = "al,alpine-cpu-resume";
	reg = <0xfbff5ed0 0x30>;
};

nb_service {
        compatible = "al,alpine-sysfabric-service", "syscon";
        reg = <0xfb070000 0x10000>;
};