| # SPDX-License-Identifier: GPL-2.0 | |
| menu "Cadence-based PCIe controllers" | |
| depends on PCI | |
| config PCIE_CADENCE | |
| tristate | |
| config PCIE_CADENCE_HOST | |
| tristate | |
| depends on OF | |
| select IRQ_DOMAIN | |
| select PCIE_CADENCE | |
| config PCIE_CADENCE_EP | |
| tristate | |
| depends on OF | |
| depends on PCI_ENDPOINT | |
| select PCIE_CADENCE | |
| config PCIE_CADENCE_PLAT | |
| tristate | |
| select PCIE_CADENCE_HOST if PCIE_CADENCE_PLAT_HOST != n | |
| select PCIE_CADENCE_EP if PCIE_CADENCE_PLAT_EP != n | |
| config PCIE_CADENCE_PLAT_HOST | |
| tristate "Cadence platform PCIe controller (host mode)" | |
| depends on OF | |
| select PCIE_CADENCE_PLAT | |
| help | |
| Say Y here if you want to support the Cadence PCIe platform controller in | |
| host mode. This PCIe controller may be embedded into many different | |
| vendors SoCs. | |
| config PCIE_CADENCE_PLAT_EP | |
| tristate "Cadence platform PCIe controller (endpoint mode)" | |
| depends on OF | |
| depends on PCI_ENDPOINT | |
| select PCIE_CADENCE_PLAT | |
| help | |
| Say Y here if you want to support the Cadence PCIe platform controller in | |
| endpoint mode. This PCIe controller may be embedded into many | |
| different vendors SoCs. | |
| config PCI_SKY1_HOST | |
| tristate "CIX SKY1 PCIe controller (host mode)" | |
| depends on OF && (ARCH_CIX || COMPILE_TEST) | |
| select PCIE_CADENCE_HOST | |
| select PCI_ECAM | |
| help | |
| Say Y here if you want to support the CIX SKY1 PCIe platform | |
| controller in host mode. CIX SKY1 PCIe controller uses Cadence | |
| HPA (High Performance Architecture IP [Second generation of | |
| Cadence PCIe IP]) | |
| This driver requires Cadence PCIe core infrastructure | |
| (PCIE_CADENCE_HOST) and hardware platform adaptation layer | |
| to function. | |
| config PCIE_SG2042_HOST | |
| tristate "Sophgo SG2042 PCIe controller (host mode)" | |
| depends on OF && (ARCH_SOPHGO || COMPILE_TEST) | |
| select PCIE_CADENCE_HOST | |
| help | |
| Say Y here if you want to support the Sophgo SG2042 PCIe platform | |
| controller in host mode. Sophgo SG2042 PCIe controller uses Cadence | |
| PCIe core. | |
| config PCI_J721E | |
| tristate | |
| select PCIE_CADENCE_HOST if PCI_J721E_HOST != n | |
| select PCIE_CADENCE_EP if PCI_J721E_EP != n | |
| config PCI_J721E_HOST | |
| tristate "TI J721E PCIe controller (host mode)" | |
| depends on ARCH_K3 || COMPILE_TEST | |
| depends on OF | |
| select PCI_J721E | |
| help | |
| Say Y here if you want to support the TI J721E PCIe platform | |
| controller in host mode. TI J721E PCIe controller uses Cadence PCIe | |
| core. | |
| config PCI_J721E_EP | |
| tristate "TI J721E PCIe controller (endpoint mode)" | |
| depends on ARCH_K3 || COMPILE_TEST | |
| depends on OF | |
| depends on PCI_ENDPOINT | |
| select PCI_J721E | |
| help | |
| Say Y here if you want to support the TI J721E PCIe platform | |
| controller in endpoint mode. TI J721E PCIe controller uses Cadence PCIe | |
| core. | |
| endmenu |