arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/dts-v1/;

#include "rk3588-rock-5b.dtsi"

/ {
	model = "Radxa ROCK 5B+";
	compatible = "radxa,rock-5b-plus", "rockchip,rk3588";

	rfkill-wwan {
		compatible = "rfkill-gpio";
		label = "rfkill-m2-wwan";
		radio-type = "wwan";
		shutdown-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
	};

	vcc3v3_4g: regulator-vcc3v3-4g {
		compatible = "regulator-fixed";
		enable-active-high;
		gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
		/* pinctrl for the GPIO is requested by vcc3v3_pcie2x1l0 */
		regulator-name = "vcc3v3_4g";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <50000>;
		vin-supply = <&vcc5v0_sys>;
	};

	vcc3v3_wwan_pwr: regulator-vcc3v3-wwan {
		compatible = "regulator-fixed";
		enable-active-high;
		gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&wwan_power_en>;
		regulator-name = "vcc3v3_wwan_pwr";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vcc3v3_4g>;
	};
};

&gpio0 {
	wwan-disable2-n-hog {
		gpios = <RK_PB2 GPIO_ACTIVE_LOW>;
		output-low;
		line-name = "M.2 B-key W_DISABLE2#";
		gpio-hog;
	};
};

&gpio2 {
	wwan-reset-n-hog {
		gpios = <RK_PB3 GPIO_ACTIVE_LOW>;
		output-low;
		line-name = "M.2 B-key RESET#";
		gpio-hog;
	};

	wwan-wake-n-hog {
		gpios = <RK_PB2 GPIO_ACTIVE_LOW>;
		input;
		line-name = "M.2 B-key WoWWAN#";
		gpio-hog;
	};
};

&i2c1 {
	eeprom@50 {
		compatible = "belling,bl24c16a", "atmel,24c16";
		reg = <0x50>;
		pagesize = <16>;
		read-only;
		vcc-supply = <&vcc_3v3_s3>;
	};
};

&pcie30phy {
	data-lanes = <1 1 2 2>;
};

&pcie3x2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie3x2_rst>;
	reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie30>;
	status = "okay";
};

&pcie3x4 {
	num-lanes = <2>;
};

&pinctrl {
	wwan {
		wwan_power_en: wwan-pwr-en {
			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	pcie3 {
		pcie3x2_rst: pcie3x2-rst {
			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	usb {
		usbc_sbu_dc: usbc-sbu-dc {
			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
					<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		vcc5v0_host_en: vcc5v0-host-en {
			rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&usb_con {
	power-role = "dual";
	try-power-role = "sink";
};

&usbdp_phy0 {
	pinctrl-names = "default";
	pinctrl-0 = <&usbc_sbu_dc>;
	sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
	sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
};

&vcc5v0_host {
	enable-active-high;
	gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&vcc5v0_host_en>;
};