arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/V2N EVK board
 *
 * Copyright (C) 2025 Renesas Electronics Corp.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "r9a09g056.dtsi"

/ {
	model = "Renesas RZ/V2N EVK Board based on r9a09g056n48";
	compatible = "renesas,rzv2n-evk", "renesas,r9a09g056n48", "renesas,r9a09g056";

	aliases {
		ethernet0 = &eth0;
		ethernet1 = &eth1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		i2c8 = &i2c8;
		mmc1 = &sdhi1;
		serial0 = &scif;
	};

	chosen {
		bootargs = "ignore_loglevel";
		stdout-path = "serial0:115200n8";
	};

	hdmi-out {
		compatible = "hdmi-connector";
		type = "d";

		port {
			hdmi_con_out: endpoint {
				remote-endpoint = <&adv7535_out>;
			};
		};
	};

	keys: keys {
		compatible = "gpio-keys";

		key-wakeup {
			interrupts-extended = <&icu 0 IRQ_TYPE_EDGE_FALLING>;
			linux,code = <KEY_WAKEUP>;
			label = "NMI_SW";
			debounce-interval = <20>;
			wakeup-source;
		};
	};

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x1 0xf8000000>;
	};

	reg_0p8v: regulator-0p8v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-0.8V";
		regulator-min-microvolt = <800000>;
		regulator-max-microvolt = <800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	vqmmc_sdhi1: regulator-vqmmc-sdhi1 {
		compatible = "regulator-gpio";
		regulator-name = "SDHI1 VqmmC";
		gpios = <&pinctrl RZV2N_GPIO(A, 2) GPIO_ACTIVE_HIGH>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		gpios-states = <0>;
		states = <3300000 0>, <1800000 1>;
	};

	/* 32.768kHz crystal */
	x6: x6-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	/* 12MHz oscillator for ADV7535 */
	y1: y1-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <12000000>;
	};
};

&audio_extal_clk {
	clock-frequency = <22579200>;
};

&dsi {
	status = "okay";

	ports {
		port@1 {
			dsi_out: endpoint {
				data-lanes = <1 2 3 4>;
				remote-endpoint = <&adv7535_in>;
			};
		};
	};
};

&du {
	status = "okay";
};

&ehci0 {
	dr_mode = "otg";
	status = "okay";
};

&eth0 {
	pinctrl-0 = <&eth0_pins>;
	pinctrl-names = "default";
	phy-handle = <&phy0>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&eth1 {
	pinctrl-0 = <&eth1_pins>;
	pinctrl-names = "default";
	phy-handle = <&phy1>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&gpu {
	status = "okay";
	mali-supply = <&reg_0p8v>;
};

&hsusb {
	dr_mode = "otg";
	status = "okay";
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";
};

&i2c1 {
	pinctrl-0 = <&i2c1_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";
};

&i2c2 {
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";
};

&i2c3 {
	pinctrl-0 = <&i2c3_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";

	adv7535: hdmi@3d {
		compatible = "adi,adv7535";
		reg = <0x3d>, <0x3f>, <0x3c>, <0x38>;
		reg-names = "main", "edid", "cec", "packet";
		clocks = <&y1>;
		clock-names = "cec";
		avdd-supply = <&reg_1p8v>;
		dvdd-supply = <&reg_1p8v>;
		pvdd-supply = <&reg_1p8v>;
		a2vdd-supply = <&reg_1p8v>;
		v3p3-supply = <&reg_3p3v>;
		v1p2-supply = <&reg_1p8v>;
		adi,dsi-lanes = <4>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				adv7535_in: endpoint {
					remote-endpoint = <&dsi_out>;
				};
			};

			port@1 {
				reg = <1>;
				adv7535_out: endpoint {
					remote-endpoint = <&hdmi_con_out>;
				};
			};
		};
	};
};

&i2c6 {
	pinctrl-0 = <&i2c6_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";
};

&i2c7 {
	pinctrl-0 = <&i2c7_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";
};

&i2c8 {
	pinctrl-0 = <&i2c8_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";

	raa215300: pmic@12 {
		compatible = "renesas,raa215300";
		reg = <0x12>, <0x6f>;
		reg-names = "main", "rtc";
		clocks = <&x6>;
		clock-names = "xin";
	};
};

&mdio0 {
	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-id0022.1640";
		reg = <0>;
		rxc-skew-psec = <0>;
		txc-skew-psec = <0>;
		rxdv-skew-psec = <0>;
		txen-skew-psec = <0>;
		rxd0-skew-psec = <0>;
		rxd1-skew-psec = <0>;
		rxd2-skew-psec = <0>;
		rxd3-skew-psec = <0>;
		txd0-skew-psec = <0>;
		txd1-skew-psec = <0>;
		txd2-skew-psec = <0>;
		txd3-skew-psec = <0>;
	};
};

&mdio1 {
	phy1: ethernet-phy@1 {
		compatible = "ethernet-phy-id0022.1640";
		reg = <0>;
		rxc-skew-psec = <0>;
		txc-skew-psec = <0>;
		rxdv-skew-psec = <0>;
		txen-skew-psec = <0>;
		rxd0-skew-psec = <0>;
		rxd1-skew-psec = <0>;
		rxd2-skew-psec = <0>;
		rxd3-skew-psec = <0>;
		txd0-skew-psec = <0>;
		txd1-skew-psec = <0>;
		txd2-skew-psec = <0>;
		txd3-skew-psec = <0>;
	};
};

&ohci0 {
	dr_mode = "otg";
	status = "okay";
};

&ostm0 {
	status = "okay";
};

&ostm1 {
	status = "okay";
};

&ostm2 {
	status = "okay";
};

&ostm3 {
	status = "okay";
};

&ostm4 {
	status = "okay";
};

&ostm5 {
	status = "okay";
};

&ostm6 {
	status = "okay";
};

&ostm7 {
	status = "okay";
};

&pinctrl {
	eth0_pins: eth0 {
		pins = "ET0_TXC_TXCLK";
		output-enable;
	};

	eth1_pins: eth1 {
		pins = "ET1_TXC_TXCLK";
		output-enable;
	};

	i2c0_pins: i2c0 {
		pinmux = <RZV2N_PORT_PINMUX(3, 0, 1)>, /* I2C0_SDA */
			 <RZV2N_PORT_PINMUX(3, 1, 1)>; /* I2C0_SCL */
	};

	i2c1_pins: i2c1 {
		pinmux = <RZV2N_PORT_PINMUX(3, 2, 1)>, /* I2C1_SDA */
			 <RZV2N_PORT_PINMUX(3, 3, 1)>; /* I2C1_SCL */
	};

	i2c2_pins: i2c2 {
		pinmux = <RZV2N_PORT_PINMUX(2, 0, 4)>, /* I2C2_SDA */
			 <RZV2N_PORT_PINMUX(2, 1, 4)>; /* I2C2_SCL */
	};

	i2c3_pins: i2c3 {
		pinmux = <RZV2N_PORT_PINMUX(3, 6, 1)>, /* I2C3_SDA */
			 <RZV2N_PORT_PINMUX(3, 7, 1)>; /* I2C3_SCL */
	};

	i2c6_pins: i2c6 {
		pinmux = <RZV2N_PORT_PINMUX(4, 4, 1)>, /* I2C6_SDA */
			 <RZV2N_PORT_PINMUX(4, 5, 1)>; /* I2C6_SCL */
		/* There are no pull-up resistors on the EVK, so enable the internal pull-up */
		bias-pull-up;
	};

	i2c7_pins: i2c7 {
		pinmux = <RZV2N_PORT_PINMUX(4, 6, 1)>, /* I2C7_SDA */
			 <RZV2N_PORT_PINMUX(4, 7, 1)>; /* I2C7_SCL */
		/* There are no pull-up resistors on the EVK, so enable the internal pull-up */
		bias-pull-up;
	};

	i2c8_pins: i2c8 {
		pinmux = <RZV2N_PORT_PINMUX(0, 6, 1)>, /* I2C8_SDA */
			 <RZV2N_PORT_PINMUX(0, 7, 1)>; /* I2C8_SCL */
	};

	scif_pins: scif {
		pins = "SCIF_TXD", "SCIF_RXD";
		renesas,output-impedance = <1>;
	};

	sd1-pwr-en-hog {
		gpio-hog;
		gpios = <RZV2N_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "sd1_pwr_en";
	};

	sdhi1_pins: sd1 {
		sd1-cd {
			pinmux = <RZV2N_PORT_PINMUX(9, 4, 14)>; /* SD1_CD */
		};

		sd1-clk {
			pins = "SD1CLK";
			renesas,output-impedance = <3>;
			slew-rate = <0>;
		};

		sd1-dat-cmd {
			pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";
			input-enable;
			renesas,output-impedance = <3>;
			slew-rate = <0>;
		};
	};

	usb20_pins: usb20 {
		ovc {
			pinmux = <RZV2N_PORT_PINMUX(9, 6, 14)>; /* OVC */
		};

		vbus {
			pinmux = <RZV2N_PORT_PINMUX(9, 5, 14)>; /* VBUS */
		};
	};

	usb3_pins: usb3 {
		pinmux = <RZV2N_PORT_PINMUX(B, 0, 14)>, /* USB30_VBUSEN */
			 <RZV2N_PORT_PINMUX(B, 1, 14)>; /* USB30_OVRCURN */
	};

	xspi_pins: xspi0 {
		ctrl {
			pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
			output-enable;
		};

		io {
			pins = "XSPI0_IO0", "XSPI0_IO1", "XSPI0_IO2", "XSPI0_IO3";
			renesas,output-impedance = <3>;
		};
	};
};

&qextal_clk {
	clock-frequency = <24000000>;
};

&rtc {
	status = "okay";
};

&rtxin_clk {
	clock-frequency = <32768>;
};

&scif {
	pinctrl-0 = <&scif_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&sdhi1 {
	pinctrl-0 = <&sdhi1_pins>;
	pinctrl-1 = <&sdhi1_pins>;
	pinctrl-names = "default", "state_uhs";
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&vqmmc_sdhi1>;
	bus-width = <4>;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	status = "okay";
};

&usb20phyrst {
	status = "okay";
};

&usb2_phy0 {
	pinctrl-0 = <&usb20_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&usb3_phy {
	status = "okay";
};

&wdt1 {
	status = "okay";
};

&xhci {
	pinctrl-0 = <&usb3_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&xspi {
	pinctrl-0 = <&xspi_pins>;
	pinctrl-names = "default";
	/*
	 * MT25QU512ABB8E12 flash chip is capable of running at 166MHz
	 * clock frequency. Set the clock frequency to the maximum 133MHz
	 * supported by the RZ/V2N SoC.
	 */
	assigned-clocks = <&cpg CPG_CORE R9A09G056_SPI_CLK_SPI>;
	assigned-clock-rates = <133333334>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		vcc-supply = <&reg_1p8v>;
		m25p,fast-read;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "bl2";
				reg = <0x00000000 0x00060000>;
			};

			partition@60000 {
				label = "fip";
				reg = <0x00060000 0x1fa0000>;
			};

			partition@2000000 {
				label = "user";
				reg = <0x2000000 0x2000000>;
			};
		};
	};
};