arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the Ironhide board
 *
 * Copyright (C) 2025 Renesas Electronics Corp.
 */

/dts-v1/;
#include "r8a78000.dtsi"

/ {
	model = "Renesas Ironhide board based on r8a78000";
	compatible = "renesas,ironhide", "renesas,r8a78000";

	aliases {
		serial0 = &hscif0;
	};

	chosen {
		stdout-path = "serial0:1843200n8";
	};

	memory@60600000 {
		device_type = "memory";
		/* first 518MiB is reserved for other purposes. */
		reg = <0x0 0x60600000 0x0 0x5fa00000>;
	};

	memory@1080000000 {
		device_type = "memory";
		reg = <0x10 0x80000000 0x0 0x80000000>;
	};

	memory@1200000000 {
		device_type = "memory";
		reg = <0x12 0x00000000 0x1 0x00000000>;
	};

	memory@1400000000 {
		device_type = "memory";
		reg = <0x14 0x00000000 0x1 0x00000000>;
	};

	memory@1600000000 {
		device_type = "memory";
		reg = <0x16 0x00000000 0x1 0x00000000>;
	};

	memory@1800000000 {
		device_type = "memory";
		reg = <0x18 0x00000000 0x1 0x00000000>;
	};

	memory@1a00000000 {
		device_type = "memory";
		reg = <0x1a 0x00000000 0x1 0x00000000>;
	};

	memory@1c00000000 {
		device_type = "memory";
		reg = <0x1c 0x00000000 0x1 0x00000000>;
	};

	memory@1e00000000 {
		device_type = "memory";
		reg = <0x1e 0x00000000 0x1 0x00000000>;
	};
};

&extal_clk {
	clock-frequency = <16666600>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&hscif0 {
	uart-has-rtscts;
	status = "okay";
};

&scif_clk {
	clock-frequency = <26000000>;
};