| // SPDX-License-Identifier: BSD-3-Clause |
| /* |
| * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. |
| */ |
| |
| /* X1P42100 is heavily based on hamoa, with some meaningful differences */ |
| #include "hamoa.dtsi" |
| |
| /delete-node/ &bwmon_cluster0; |
| /delete-node/ &cluster_pd2; |
| /delete-node/ &cpu_map_cluster2; |
| /delete-node/ &cpu8; |
| /delete-node/ &cpu9; |
| /delete-node/ &cpu10; |
| /delete-node/ &cpu11; |
| /delete-node/ &cpu_pd8; |
| /delete-node/ &cpu_pd9; |
| /delete-node/ &cpu_pd10; |
| /delete-node/ &cpu_pd11; |
| /delete-node/ &gpu_opp_table; |
| /delete-node/ &gpu_speed_bin; |
| /delete-node/ &pcie3_phy; |
| /delete-node/ &thermal_zones; |
| |
| &gcc { |
| compatible = "qcom,x1p42100-gcc", "qcom,x1e80100-gcc"; |
| }; |
| |
| &gmu { |
| compatible = "qcom,adreno-gmu-x145.0", "qcom,adreno-gmu"; |
| }; |
| |
| &gpu { |
| compatible = "qcom,adreno-43030c00", "qcom,adreno"; |
| |
| nvmem-cells = <&gpu_speed_bin>; |
| nvmem-cell-names = "speed_bin"; |
| |
| gpu_opp_table: opp-table { |
| compatible = "operating-points-v2-adreno", "operating-points-v2"; |
| |
| opp-1400000000 { |
| opp-hz = /bits/ 64 <1400000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L4>; |
| opp-peak-kBps = <16500000>; |
| qcom,opp-acd-level = <0xa8295ffd>; |
| opp-supported-hw = <0x3>; |
| }; |
| |
| opp-1250000000 { |
| opp-hz = /bits/ 64 <1250000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L3>; |
| opp-peak-kBps = <16500000>; |
| qcom,opp-acd-level = <0x882a5ffd>; |
| opp-supported-hw = <0x7>; |
| }; |
| |
| opp-1107000000 { |
| opp-hz = /bits/ 64 <1107000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; |
| opp-peak-kBps = <16500000>; |
| qcom,opp-acd-level = <0x882a5ffd>; |
| opp-supported-hw = <0xf>; |
| }; |
| |
| opp-1014000000 { |
| opp-hz = /bits/ 64 <1014000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; |
| opp-peak-kBps = <14398438>; |
| qcom,opp-acd-level = <0xa82a5ffd>; |
| opp-supported-hw = <0xf>; |
| }; |
| |
| opp-940000000 { |
| opp-hz = /bits/ 64 <940000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; |
| opp-peak-kBps = <14398438>; |
| qcom,opp-acd-level = <0xa82a5ffd>; |
| opp-supported-hw = <0xf>; |
| }; |
| |
| opp-825000000 { |
| opp-hz = /bits/ 64 <825000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_NOM>; |
| opp-peak-kBps = <12449219>; |
| qcom,opp-acd-level = <0x882b5ffd>; |
| opp-supported-hw = <0xf>; |
| }; |
| |
| opp-720000000 { |
| opp-hz = /bits/ 64 <720000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; |
| opp-peak-kBps = <10687500>; |
| qcom,opp-acd-level = <0xa82c5ffd>; |
| opp-supported-hw = <0xf>; |
| }; |
| |
| opp-666000000-0 { |
| opp-hz = /bits/ 64 <666000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; |
| opp-peak-kBps = <8171875>; |
| qcom,opp-acd-level = <0xa82d5ffd>; |
| opp-supported-hw = <0xf>; |
| }; |
| |
| /* Only applicable for SKUs which has 666Mhz as Fmax */ |
| opp-666000000-1 { |
| opp-hz = /bits/ 64 <666000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; |
| opp-peak-kBps = <16500000>; |
| qcom,opp-acd-level = <0xa82d5ffd>; |
| opp-supported-hw = <0x10>; |
| }; |
| |
| opp-550000000 { |
| opp-hz = /bits/ 64 <550000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_SVS>; |
| opp-peak-kBps = <6074219>; |
| qcom,opp-acd-level = <0x882e5ffd>; |
| opp-supported-hw = <0x1f>; |
| }; |
| |
| opp-380000000 { |
| opp-hz = /bits/ 64 <380000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; |
| opp-peak-kBps = <3000000>; |
| qcom,opp-acd-level = <0xc82f5ffd>; |
| opp-supported-hw = <0x1f>; |
| }; |
| |
| opp-280000000 { |
| opp-hz = /bits/ 64 <280000000>; |
| opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>; |
| opp-peak-kBps = <2136719>; |
| qcom,opp-acd-level = <0xc82f5ffd>; |
| opp-supported-hw = <0x1f>; |
| }; |
| }; |
| |
| }; |
| |
| &gpucc { |
| compatible = "qcom,x1p42100-gpucc"; |
| }; |
| |
| /* PCIe3 has half the lanes compared to X1E80100 */ |
| &pcie3 { |
| num-lanes = <4>; |
| }; |
| |
| &pcie6a_phy { |
| compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy"; |
| }; |
| |
| &qfprom { |
| gpu_speed_bin: gpu-speed-bin@119 { |
| reg = <0x119 0x2>; |
| bits = <7 9>; |
| }; |
| }; |
| |
| &soc { |
| /* The PCIe3 PHY on X1P42100 uses a different IP block */ |
| pcie3_phy: phy@1bd4000 { |
| compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy"; |
| reg = <0x0 0x01bd4000 0x0 0x2000>, |
| <0x0 0x01bd6000 0x0 0x2000>; |
| |
| clocks = <&gcc GCC_PCIE_3_PHY_AUX_CLK>, |
| <&gcc GCC_PCIE_3_CFG_AHB_CLK>, |
| <&tcsr TCSR_PCIE_8L_CLKREF_EN>, |
| <&gcc GCC_PCIE_3_PHY_RCHNG_CLK>, |
| <&gcc GCC_PCIE_3_PIPE_CLK>, |
| <&gcc GCC_PCIE_3_PIPEDIV2_CLK>; |
| clock-names = "aux", |
| "cfg_ahb", |
| "ref", |
| "rchng", |
| "pipe", |
| "pipediv2"; |
| |
| resets = <&gcc GCC_PCIE_3_PHY_BCR>, |
| <&gcc GCC_PCIE_3_NOCSR_COM_PHY_BCR>; |
| reset-names = "phy", |
| "phy_nocsr"; |
| |
| assigned-clocks = <&gcc GCC_PCIE_3_PHY_RCHNG_CLK>; |
| assigned-clock-rates = <100000000>; |
| |
| power-domains = <&gcc GCC_PCIE_3_PHY_GDSC>; |
| |
| #clock-cells = <0>; |
| clock-output-names = "pcie3_pipe_clk"; |
| |
| #phy-cells = <0>; |
| |
| status = "disabled"; |
| }; |
| }; |
| |
| /* While physically present, this controller is left unconfigured and unused */ |
| &tsens3 { |
| status = "disabled"; |
| }; |
| |
| / { |
| thermal-zones { |
| aoss0-thermal { |
| thermal-sensors = <&tsens0 0>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-0-top-thermal { |
| thermal-sensors = <&tsens0 1>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-0-btm-thermal { |
| thermal-sensors = <&tsens0 2>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-1-top-thermal { |
| thermal-sensors = <&tsens0 3>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-1-btm-thermal { |
| thermal-sensors = <&tsens0 4>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-2-top-thermal { |
| thermal-sensors = <&tsens0 5>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-2-btm-thermal { |
| thermal-sensors = <&tsens0 6>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-3-top-thermal { |
| thermal-sensors = <&tsens0 7>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu0-3-btm-thermal { |
| thermal-sensors = <&tsens0 8>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpuss0-top-thermal { |
| thermal-sensors = <&tsens0 9>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpuss0-btm-thermal { |
| thermal-sensors = <&tsens0 10>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| mem-thermal { |
| thermal-sensors = <&tsens0 11>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <0>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| video-thermal { |
| thermal-sensors = <&tsens0 12>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| aoss1-thermal { |
| thermal-sensors = <&tsens1 0>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-0-top-thermal { |
| thermal-sensors = <&tsens1 1>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-0-btm-thermal { |
| thermal-sensors = <&tsens1 2>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-1-top-thermal { |
| thermal-sensors = <&tsens1 3>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-1-btm-thermal { |
| thermal-sensors = <&tsens1 4>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-2-top-thermal { |
| thermal-sensors = <&tsens1 5>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-2-btm-thermal { |
| thermal-sensors = <&tsens1 6>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-3-top-thermal { |
| thermal-sensors = <&tsens1 7>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpu1-3-btm-thermal { |
| thermal-sensors = <&tsens1 8>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpuss1-top-thermal { |
| thermal-sensors = <&tsens1 9>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| cpuss1-btm-thermal { |
| thermal-sensors = <&tsens1 10>; |
| |
| trips { |
| trip-point0 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| aoss2-thermal { |
| thermal-sensors = <&tsens2 0>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| nsp0-thermal { |
| thermal-sensors = <&tsens2 1>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| nsp1-thermal { |
| thermal-sensors = <&tsens2 2>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| nsp2-thermal { |
| thermal-sensors = <&tsens2 3>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| nsp3-thermal { |
| thermal-sensors = <&tsens2 4>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| gpuss-0-thermal { |
| polling-delay-passive = <200>; |
| |
| thermal-sensors = <&tsens2 5>; |
| |
| cooling-maps { |
| map0 { |
| trip = <&gpuss0_alert0>; |
| cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| }; |
| }; |
| |
| trips { |
| gpuss0_alert0: trip-point0 { |
| temperature = <95000>; |
| hysteresis = <1000>; |
| type = "passive"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| gpuss-1-thermal { |
| polling-delay-passive = <200>; |
| |
| thermal-sensors = <&tsens2 6>; |
| |
| cooling-maps { |
| map0 { |
| trip = <&gpuss1_alert0>; |
| cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| }; |
| }; |
| |
| trips { |
| gpuss1_alert0: trip-point0 { |
| temperature = <95000>; |
| hysteresis = <1000>; |
| type = "passive"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| gpuss-2-thermal { |
| polling-delay-passive = <200>; |
| |
| thermal-sensors = <&tsens2 7>; |
| |
| cooling-maps { |
| map0 { |
| trip = <&gpuss2_alert0>; |
| cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| }; |
| }; |
| |
| trips { |
| gpuss2_alert0: trip-point0 { |
| temperature = <95000>; |
| hysteresis = <1000>; |
| type = "passive"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| gpuss-3-thermal { |
| polling-delay-passive = <200>; |
| |
| thermal-sensors = <&tsens2 8>; |
| |
| cooling-maps { |
| map0 { |
| trip = <&gpuss3_alert0>; |
| cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| }; |
| }; |
| |
| trips { |
| gpuss3_alert0: trip-point0 { |
| temperature = <95000>; |
| hysteresis = <1000>; |
| type = "passive"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| camera0-thermal { |
| thermal-sensors = <&tsens2 9>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| |
| camera1-thermal { |
| thermal-sensors = <&tsens2 10>; |
| |
| trips { |
| trip-point0 { |
| temperature = <90000>; |
| hysteresis = <2000>; |
| type = "hot"; |
| }; |
| |
| trip-point1 { |
| temperature = <115000>; |
| hysteresis = <1000>; |
| type = "critical"; |
| }; |
| }; |
| }; |
| }; |
| }; |