| // SPDX-License-Identifier: BSD-3-Clause |
| /* |
| * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/pwm/pwm.h> |
| #include <dt-bindings/sound/qcom,q6afe.h> |
| #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
| |
| #include "monaco.dtsi" |
| #include "monaco-pmics.dtsi" |
| |
| / { |
| model = "Qualcomm Technologies, Inc. Monaco EVK"; |
| compatible = "qcom,monaco-evk", "qcom,qcs8300"; |
| |
| aliases { |
| ethernet0 = ðernet0; |
| i2c1 = &i2c1; |
| serial0 = &uart7; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| dmic: audio-codec-0 { |
| compatible = "dmic-codec"; |
| #sound-dai-cells = <0>; |
| num-channels = <1>; |
| }; |
| |
| max98357a: audio-codec-1 { |
| compatible = "maxim,max98357a"; |
| #sound-dai-cells = <0>; |
| }; |
| |
| sound { |
| compatible = "qcom,qcs8275-sndcard"; |
| model = "MONACO-EVK"; |
| |
| pinctrl-0 = <&hs0_mi2s_active>, <&mi2s1_active>; |
| pinctrl-names = "default"; |
| |
| hs0-mi2s-playback-dai-link { |
| link-name = "HS0 MI2S Playback"; |
| |
| codec { |
| sound-dai = <&max98357a>; |
| }; |
| |
| cpu { |
| sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>; |
| }; |
| |
| platform { |
| sound-dai = <&q6apm>; |
| }; |
| }; |
| |
| sec-mi2s-capture-dai-link { |
| link-name = "Secondary MI2S Capture"; |
| |
| codec { |
| sound-dai = <&dmic>; |
| }; |
| |
| cpu { |
| sound-dai = <&q6apmbedai SECONDARY_MI2S_TX>; |
| }; |
| |
| platform { |
| sound-dai = <&q6apm>; |
| }; |
| }; |
| }; |
| }; |
| |
| &apps_rsc { |
| regulators-0 { |
| compatible = "qcom,pmm8654au-rpmh-regulators"; |
| qcom,pmic-id = "a"; |
| |
| vreg_l3a: ldo3 { |
| regulator-name = "vreg_l3a"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l4a: ldo4 { |
| regulator-name = "vreg_l4a"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l5a: ldo5 { |
| regulator-name = "vreg_l5a"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l6a: ldo6 { |
| regulator-name = "vreg_l6a"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7a: ldo7 { |
| regulator-name = "vreg_l7a"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l8a: ldo8 { |
| regulator-name = "vreg_l8a"; |
| regulator-min-microvolt = <2504000>; |
| regulator-max-microvolt = <2960000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l9a: ldo9 { |
| regulator-name = "vreg_l9a"; |
| regulator-min-microvolt = <2970000>; |
| regulator-max-microvolt = <3072000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| |
| regulators-1 { |
| compatible = "qcom,pmm8654au-rpmh-regulators"; |
| qcom,pmic-id = "c"; |
| |
| vreg_s5c: smps5 { |
| regulator-name = "vreg_s5c"; |
| regulator-min-microvolt = <1104000>; |
| regulator-max-microvolt = <1104000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l1c: ldo1 { |
| regulator-name = "vreg_l1c"; |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <512000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l2c: ldo2 { |
| regulator-name = "vreg_l2c"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <904000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l4c: ldo4 { |
| regulator-name = "vreg_l4c"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7c: ldo7 { |
| regulator-name = "vreg_l7c"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l8c: ldo8 { |
| regulator-name = "vreg_l8c"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l9c: ldo9 { |
| regulator-name = "vreg_l9c"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| }; |
| |
| ðernet0 { |
| phy-mode = "2500base-x"; |
| phy-handle = <&hsgmii_phy0>; |
| |
| pinctrl-0 = <ðernet0_default>; |
| pinctrl-names = "default"; |
| |
| snps,mtl-rx-config = <&mtl_rx_setup>; |
| snps,mtl-tx-config = <&mtl_tx_setup>; |
| nvmem-cells = <&mac_addr0>; |
| nvmem-cell-names = "mac-address"; |
| |
| status = "okay"; |
| |
| mdio { |
| compatible = "snps,dwmac-mdio"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| hsgmii_phy0: ethernet-phy@1c { |
| compatible = "ethernet-phy-id004d.d101"; |
| reg = <0x1c>; |
| reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; |
| reset-assert-us = <11000>; |
| reset-deassert-us = <70000>; |
| }; |
| }; |
| |
| mtl_rx_setup: rx-queues-config { |
| snps,rx-queues-to-use = <4>; |
| snps,rx-sched-sp; |
| |
| queue0 { |
| snps,dcb-algorithm; |
| snps,map-to-dma-channel = <0x0>; |
| snps,route-up; |
| snps,priority = <0x1>; |
| }; |
| |
| queue1 { |
| snps,dcb-algorithm; |
| snps,map-to-dma-channel = <0x1>; |
| snps,route-ptp; |
| }; |
| |
| queue2 { |
| snps,avb-algorithm; |
| snps,map-to-dma-channel = <0x2>; |
| snps,route-avcp; |
| }; |
| |
| queue3 { |
| snps,avb-algorithm; |
| snps,map-to-dma-channel = <0x3>; |
| snps,priority = <0xc>; |
| }; |
| }; |
| |
| mtl_tx_setup: tx-queues-config { |
| snps,tx-queues-to-use = <4>; |
| |
| queue0 { |
| snps,dcb-algorithm; |
| }; |
| |
| queue1 { |
| snps,dcb-algorithm; |
| }; |
| |
| queue2 { |
| snps,avb-algorithm; |
| snps,send_slope = <0x1000>; |
| snps,idle_slope = <0x1000>; |
| snps,high_credit = <0x3e800>; |
| snps,low_credit = <0xffc18000>; |
| }; |
| |
| queue3 { |
| snps,avb-algorithm; |
| snps,send_slope = <0x1000>; |
| snps,idle_slope = <0x1000>; |
| snps,high_credit = <0x3e800>; |
| snps,low_credit = <0xffc18000>; |
| }; |
| }; |
| }; |
| |
| &gpi_dma0 { |
| status = "okay"; |
| }; |
| |
| &gpi_dma1 { |
| status = "okay"; |
| }; |
| |
| &gpu { |
| status = "okay"; |
| }; |
| |
| &gpu_zap_shader { |
| firmware-name = "qcom/qcs8300/a623_zap.mbn"; |
| }; |
| |
| &i2c1 { |
| pinctrl-0 = <&qup_i2c1_default>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| |
| fan_controller: fan@18 { |
| compatible = "ti,amc6821"; |
| reg = <0x18>; |
| #pwm-cells = <2>; |
| |
| fan { |
| pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>; |
| }; |
| }; |
| |
| eeprom0: eeprom@50 { |
| compatible = "atmel,24c256"; |
| reg = <0x50>; |
| pagesize = <64>; |
| |
| nvmem-layout { |
| compatible = "fixed-layout"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| mac_addr0: mac-addr@0 { |
| reg = <0x0 0x6>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c15 { |
| pinctrl-0 = <&qup_i2c15_default>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| |
| expander0: gpio@38 { |
| compatible = "ti,tca9538"; |
| reg = <0x38>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| |
| expander1: gpio@39 { |
| compatible = "ti,tca9538"; |
| reg = <0x39>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| |
| expander2: gpio@3a { |
| compatible = "ti,tca9538"; |
| reg = <0x3a>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| |
| expander3: gpio@3b { |
| compatible = "ti,tca9538"; |
| reg = <0x3b>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| |
| expander4: gpio@3c { |
| compatible = "ti,tca9538"; |
| reg = <0x3c>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| |
| expander5: gpio@3d { |
| compatible = "ti,tca9538"; |
| reg = <0x3d>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| |
| expander6: gpio@3e { |
| compatible = "ti,tca9538"; |
| reg = <0x3e>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| }; |
| }; |
| |
| &iris { |
| status = "okay"; |
| }; |
| |
| &pcie0 { |
| pinctrl-0 = <&pcie0_default_state>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &pcie0_phy { |
| vdda-phy-supply = <&vreg_l6a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie1 { |
| pinctrl-0 = <&pcie1_default_state>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &pcie1_phy { |
| vdda-phy-supply = <&vreg_l6a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &pcieport0 { |
| reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &pcieport1 { |
| reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &qupv3_id_0 { |
| firmware-name = "qcom/qcs8300/qupv3fw.elf"; |
| status = "okay"; |
| }; |
| |
| &qupv3_id_1 { |
| firmware-name = "qcom/qcs8300/qupv3fw.elf"; |
| status = "okay"; |
| }; |
| |
| &remoteproc_adsp { |
| firmware-name = "qcom/qcs8300/adsp.mbn"; |
| |
| status = "okay"; |
| }; |
| |
| &remoteproc_cdsp { |
| firmware-name = "qcom/qcs8300/cdsp0.mbn"; |
| |
| status = "okay"; |
| }; |
| |
| &remoteproc_gpdsp { |
| firmware-name = "qcom/qcs8300/gpdsp0.mbn"; |
| |
| status = "okay"; |
| }; |
| |
| &serdes0 { |
| phy-supply = <&vreg_l4a>; |
| |
| status = "okay"; |
| }; |
| |
| &spi10 { |
| status = "okay"; |
| |
| tpm@0 { |
| compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; |
| reg = <0>; |
| spi-max-frequency = <20000000>; |
| }; |
| }; |
| |
| &tlmm { |
| |
| pcie0_default_state: pcie0-default-state { |
| wake-pins { |
| pins = "gpio0"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| clkreq-pins { |
| pins = "gpio1"; |
| function = "pcie0_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| perst-pins { |
| pins = "gpio2"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| ethernet0_default: ethernet0-default-state { |
| ethernet0_mdc: ethernet0-mdc-pins { |
| pins = "gpio5"; |
| function = "emac0_mdc"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| ethernet0_mdio: ethernet0-mdio-pins { |
| pins = "gpio6"; |
| function = "emac0_mdio"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| }; |
| |
| qup_i2c1_default: qup-i2c1-state { |
| pins = "gpio19", "gpio20"; |
| function = "qup0_se1"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| pcie1_default_state: pcie1-default-state { |
| wake-pins { |
| pins = "gpio21"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| clkreq-pins { |
| pins = "gpio22"; |
| function = "pcie1_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| perst-pins { |
| pins = "gpio23"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| qup_i2c15_default: qup-i2c15-state { |
| pins = "gpio91", "gpio92"; |
| function = "qup1_se7"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| &uart7 { |
| status = "okay"; |
| }; |
| |
| &ufs_mem_hc { |
| reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; |
| vcc-supply = <&vreg_l8a>; |
| vcc-max-microamp = <1100000>; |
| vccq-supply = <&vreg_l4c>; |
| vccq-max-microamp = <1200000>; |
| |
| status = "okay"; |
| }; |
| |
| &ufs_mem_phy { |
| vdda-phy-supply = <&vreg_l4a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_1 { |
| dr_mode = "peripheral"; |
| |
| status = "okay"; |
| }; |
| |
| &usb_1_hsphy { |
| vdda-pll-supply = <&vreg_l7a>; |
| vdda18-supply = <&vreg_l7c>; |
| vdda33-supply = <&vreg_l9a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_qmpphy { |
| vdda-phy-supply = <&vreg_l7a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
