| // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| /* |
| * IPQ9574 RDP433 board device tree source |
| * |
| * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. |
| * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include "ipq9574-rdp-common.dtsi" |
| |
| / { |
| model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; |
| compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; |
| }; |
| |
| &pcie1_phy { |
| status = "okay"; |
| }; |
| |
| &pcie1 { |
| pinctrl-0 = <&pcie1_default>; |
| pinctrl-names = "default"; |
| |
| perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &pcie2_phy { |
| status = "okay"; |
| }; |
| |
| &pcie2 { |
| pinctrl-0 = <&pcie2_default>; |
| pinctrl-names = "default"; |
| |
| perst-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &pcie3_phy { |
| status = "okay"; |
| }; |
| |
| &pcie3 { |
| pinctrl-0 = <&pcie3_default>; |
| pinctrl-names = "default"; |
| |
| perst-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &tlmm { |
| |
| pcie1_default: pcie1-default-state { |
| clkreq-n-pins { |
| pins = "gpio25"; |
| function = "pcie1_clk"; |
| drive-strength = <6>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio26"; |
| function = "gpio"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-low; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio27"; |
| function = "pcie1_wake"; |
| drive-strength = <6>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie2_default: pcie2-default-state { |
| clkreq-n-pins { |
| pins = "gpio28"; |
| function = "pcie2_clk"; |
| drive-strength = <6>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio29"; |
| function = "gpio"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-low; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio30"; |
| function = "pcie2_wake"; |
| drive-strength = <6>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie3_default: pcie3-default-state { |
| clkreq-n-pins { |
| pins = "gpio31"; |
| function = "pcie3_clk"; |
| drive-strength = <6>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio32"; |
| function = "gpio"; |
| drive-strength = <8>; |
| bias-pull-up; |
| output-low; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio33"; |
| function = "pcie3_wake"; |
| drive-strength = <6>; |
| bias-pull-up; |
| }; |
| }; |
| }; |