arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2025 NXP
 */

/dts-v1/;

#include "imx95-19x19-evk.dts"

/ {
	sof_cpu: cm7-cpu@80000000 {
		compatible = "fsl,imx95-cm7-sof";
		reg = <0x0 0x80000000 0x0 0x6100000>;
		reg-names = "sram";
		memory-region = <&adma_res>;
		memory-region-names = "dma";
		mboxes = <&mu7 2 0>, <&mu7 2 1>, <&mu7 3 0>, <&mu7 3 1>;
		mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";

		sai3_cpu: port {
			sai3_cpu_ep: endpoint {
				remote-endpoint = <&wm8962_ep>;
			};
		};
	};

	reserved-memory {
		adma_res: memory@86100000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x86100000 0x0 0x100000>;
			no-map;
		};
	};

	sof-sound {
		compatible = "audio-graph-card2";
		links = <&sai3_cpu>;
		label = "audio";
		hp-det-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hp>;
		widgets = "Headphone", "Headphones",
			  "Microphone", "Headset Mic";
		routing = "Headphones", "HPOUTL",
			  "Headphones", "HPOUTR",
			  "Headset Mic", "MICBIAS",
			  "IN3R", "Headset Mic",
			  "IN1R", "Headset Mic";
	};

	sound-wm8962 {
		status = "disabled";
	};

};

&edma2 {
	/* channels 30 and 31 reserved for FW usage */
	dma-channel-mask = <0xc0000000>, <0x0>;
};

&sai3 {
	status = "disabled";
};

&wm8962 {
	assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
			  <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
			  <&scmi_clk IMX95_CLK_AUDIOPLL1>,
			  <&scmi_clk IMX95_CLK_AUDIOPLL2>,
			  <&scmi_clk IMX95_CLK_SAI3>;
	assigned-clock-parents = <0>, <0>, <0>, <0>, <&scmi_clk IMX95_CLK_AUDIOPLL1>;
	assigned-clock-rates = <3932160000>, <3612672000>,
			       <393216000>, <361267200>,
			       <12288000>;

	port {
		wm8962_ep: endpoint {
			bitclock-master;
			frame-master;
			remote-endpoint = <&sai3_cpu_ep>;
		};
	};
};