| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| /* | |
| * sama7d65.dtsi - Device Tree Include file for SAMA7D65 SoC | |
| * | |
| * Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries | |
| * | |
| * Author: Ryan Wanner <Ryan.Wanner@microchip.com> | |
| * | |
| */ | |
| #include <dt-bindings/clock/at91.h> | |
| #include <dt-bindings/dma/at91.h> | |
| #include <dt-bindings/gpio/gpio.h> | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| #include <dt-bindings/interrupt-controller/irq.h> | |
| #include <dt-bindings/mfd/at91-usart.h> | |
| / { | |
| model = "Microchip SAMA7D65 family SoC"; | |
| compatible = "microchip,sama7d65"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| interrupt-parent = <&gic>; | |
| cpus { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cpu0: cpu@0 { | |
| compatible = "arm,cortex-a7"; | |
| reg = <0x0>; | |
| device_type = "cpu"; | |
| clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>; | |
| clock-names = "cpu"; | |
| d-cache-size = <0x8000>; // L1, 32 KB | |
| i-cache-size = <0x8000>; // L1, 32 KB | |
| next-level-cache = <&L2>; | |
| L2: l2-cache { | |
| compatible = "cache"; | |
| cache-level = <2>; | |
| cache-size = <0x40000>; // L2, 256 KB | |
| cache-unified; | |
| }; | |
| }; | |
| }; | |
| clocks { | |
| main_xtal: clock-mainxtal { | |
| compatible = "fixed-clock"; | |
| clock-output-names = "main_xtal"; | |
| #clock-cells = <0>; | |
| }; | |
| slow_xtal: clock-slowxtal { | |
| compatible = "fixed-clock"; | |
| clock-output-names = "slow_xtal"; | |
| #clock-cells = <0>; | |
| }; | |
| }; | |
| ns_sram: sram@100000 { | |
| compatible = "mmio-sram"; | |
| reg = <0x100000 0x20000>; | |
| ranges; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a7-pmu"; | |
| interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
| }; | |
| soc { | |
| compatible = "simple-bus"; | |
| ranges; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| securam: sram@e0000800 { | |
| compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram"; | |
| reg = <0xe0000800 0x4000>; | |
| ranges = <0 0xe0000800 0x4000>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| no-memory-wc; | |
| }; | |
| secumod: security-module@e0004000 { | |
| compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon"; | |
| reg = <0xe0004000 0x4000>; | |
| gpio-controller; | |
| #gpio-cells = <2>; | |
| }; | |
| sfrbu: sfr@e0008000 { | |
| compatible = "microchip,sama7d65-sfrbu", "atmel,sama5d2-sfrbu", "syscon"; | |
| reg = <0xe0008000 0x20>; | |
| }; | |
| pioa: pinctrl@e0014000 { | |
| compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl"; | |
| reg = <0xe0014000 0x800>; | |
| interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; | |
| interrupt-controller; | |
| #interrupt-cells = <2>; | |
| gpio-controller; | |
| #gpio-cells = <2>; | |
| }; | |
| pmc: clock-controller@e0018000 { | |
| compatible = "microchip,sama7d65-pmc", "syscon"; | |
| reg = <0xe0018000 0x200>; | |
| interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| #clock-cells = <2>; | |
| clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>; | |
| clock-names = "td_slck", "md_slck", "main_xtal"; | |
| }; | |
| ps_wdt: watchdog@e001d000 { | |
| compatible = "microchip,sama7d65-wdt", "microchip,sama7g5-wdt"; | |
| reg = <0xe001d000 0x30>; | |
| interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&clk32k 0>; | |
| }; | |
| reset_controller: reset-controller@e001d100 { | |
| compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc"; | |
| reg = <0xe001d100 0xc>, <0xe001d1e4 0x4>; | |
| #reset-cells = <1>; | |
| clocks = <&clk32k 0>; | |
| }; | |
| shdwc: poweroff@e001d200 { | |
| compatible = "microchip,sama7d65-shdwc", "microchip,sama7g5-shdwc", "syscon"; | |
| reg = <0xe001d200 0x20>; | |
| clocks = <&clk32k 0>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| atmel,wakeup-rtc-timer; | |
| atmel,wakeup-rtt-timer; | |
| status = "disabled"; | |
| }; | |
| rtt: rtc@e001d300 { | |
| compatible = "microchip,sama7d65-rtt", "atmel,at91sam9260-rtt"; | |
| reg = <0xe001d300 0x30>; | |
| interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&clk32k 0>; | |
| }; | |
| clk32k: clock-controller@e001d500 { | |
| compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc"; | |
| reg = <0xe001d500 0x4>; | |
| clocks = <&slow_xtal>; | |
| #clock-cells = <1>; | |
| }; | |
| gpbr: syscon@e001d700 { | |
| compatible = "microchip,sama7d65-gpbr", "syscon"; | |
| reg = <0xe001d700 0x48>; | |
| }; | |
| rtc: rtc@e001d800 { | |
| compatible = "microchip,sama7d65-rtc", "microchip,sam9x60-rtc"; | |
| reg = <0xe001d800 0x30>; | |
| interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&clk32k 1>; | |
| }; | |
| chipid@e0020000 { | |
| compatible = "microchip,sama7d65-chipid"; | |
| reg = <0xe0020000 0x8>; | |
| }; | |
| can0: can@e0828000 { | |
| compatible = "bosch,m_can"; | |
| reg = <0xe0828000 0x200>, <0x100000 0x7800>; | |
| reg-names = "m_can", "message_ram"; | |
| interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-names = "int0", "int1"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>; | |
| clock-names = "hclk", "cclk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 58>; | |
| assigned-clock-rates = <40000000>; | |
| assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; | |
| bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>; | |
| status = "disabled"; | |
| }; | |
| can1: can@e082c000 { | |
| compatible = "bosch,m_can"; | |
| reg = <0xe082c000 0x200>, <0x100000 0xbc00>; | |
| reg-names = "m_can", "message_ram"; | |
| interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-names = "int0", "int1"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>; | |
| clock-names = "hclk", "cclk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 59>; | |
| assigned-clock-rates = <40000000>; | |
| assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; | |
| bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>; | |
| status = "disabled"; | |
| }; | |
| can2: can@e0830000 { | |
| compatible = "bosch,m_can"; | |
| reg = <0xe0830000 0x200>, <0x100000 0x10000>; | |
| reg-names = "m_can", "message_ram"; | |
| interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-names = "int0", "int1"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 60>, <&pmc PMC_TYPE_GCK 60>; | |
| clock-names = "hclk", "cclk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 60>; | |
| assigned-clock-rates = <40000000>; | |
| assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; | |
| bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>; | |
| status = "disabled"; | |
| }; | |
| can3: can@e0834000 { | |
| compatible = "bosch,m_can"; | |
| reg = <0xe0834000 0x200>, <0x110000 0x4400>; | |
| reg-names = "m_can", "message_ram"; | |
| interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-names = "int0", "int1"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>; | |
| clock-names = "hclk", "cclk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 61>; | |
| assigned-clock-rates = <40000000>; | |
| assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; | |
| bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>; | |
| status = "disabled"; | |
| }; | |
| can4: can@e0838000 { | |
| compatible = "bosch,m_can"; | |
| reg = <0xe0838000 0x200>, <0x110000 0x8800>; | |
| reg-names = "m_can", "message_ram"; | |
| interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-names = "int0", "int1"; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>; | |
| clock-names = "hclk", "cclk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 62>; | |
| assigned-clock-rates = <40000000>; | |
| assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; | |
| bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>; | |
| status = "disabled"; | |
| }; | |
| dma2: dma-controller@e1200000 { | |
| compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; | |
| reg = <0xe1200000 0x1000>; | |
| interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; | |
| #dma-cells = <1>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; | |
| clock-names = "dma_clk"; | |
| dma-requests = <0>; | |
| status = "disabled"; | |
| }; | |
| sdmmc1: mmc@e1208000 { | |
| compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci"; | |
| reg = <0xe1208000 0x400>; | |
| interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 76>, <&pmc PMC_TYPE_GCK 76>; | |
| clock-names = "hclock", "multclk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 76>; | |
| assigned-clock-rates = <200000000>; | |
| assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK1>; | |
| status = "disabled"; | |
| }; | |
| xlcdc: lcd-controller@e1400000 { | |
| compatible = "microchip,sama7d65-xlcdc"; | |
| reg = <0xe1400000 0x2000>; | |
| interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>, <&clk32k 1>; | |
| clock-names = "periph_clk", "sys_clk", "slow_clk"; | |
| status = "disabled"; | |
| display-controller { | |
| compatible = "atmel,hlcdc-display-controller"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| port@0 { | |
| reg = <0>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| }; | |
| }; | |
| pwm { | |
| compatible = "atmel,hlcdc-pwm"; | |
| #pwm-cells = <3>; | |
| }; | |
| }; | |
| lvdsc: lvds-controller@e1408000 { | |
| compatible = "microchip,sama7d65-lvds", "microchip,sam9x75-lvds"; | |
| reg = <0xe1408000 0x100>; | |
| interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 104>; | |
| clock-names = "pclk"; | |
| status = "disabled"; | |
| }; | |
| aes: crypto@e1600000 { | |
| compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes"; | |
| reg = <0xe1600000 0x100>; | |
| interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; | |
| clock-names = "aes_clk"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(2)>; | |
| dma-names = "tx", "rx"; | |
| }; | |
| sha: crypto@e1604000 { | |
| compatible = "microchip,sama7d65-sha", "atmel,at91sam9g46-sha"; | |
| reg = <0xe1604000 0x100>; | |
| interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 78>; | |
| clock-names = "sha_clk"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; | |
| dma-names = "tx"; | |
| }; | |
| tdes: crypto@e1608000 { | |
| compatible = "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes"; | |
| reg = <0xe1608000 0x100>; | |
| interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 91>; | |
| clock-names = "tdes_clk"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(53)>; | |
| dma-names = "tx", "rx"; | |
| }; | |
| trng: rng@e160c000 { | |
| compatible = "microchip,sama7d65-trng", "microchip,sam9x60-trng"; | |
| reg = <0xe160c000 0x100>; | |
| interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 92>; | |
| }; | |
| dma0: dma-controller@e1610000 { | |
| compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; | |
| reg = <0xe1610000 0x1000>; | |
| interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
| #dma-cells = <1>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; | |
| clock-names = "dma_clk"; | |
| status = "disabled"; | |
| }; | |
| dma1: dma-controller@e1614000 { | |
| compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; | |
| reg = <0xe1614000 0x1000>; | |
| interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
| #dma-cells = <1>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; | |
| clock-names = "dma_clk"; | |
| status = "disabled"; | |
| }; | |
| gmac0: ethernet@e1618000 { | |
| compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem"; | |
| reg = <0xe1618000 0x2000>; | |
| interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>; | |
| clock-names = "pclk", "hclk", "tx_clk", "tsu_clk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>; | |
| assigned-clock-rates = <125000000>, <200000000>; | |
| status = "disabled"; | |
| }; | |
| gmac1: ethernet@e161c000 { | |
| compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem"; | |
| reg = <0xe161c000 0x2000>; | |
| interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_PERIPHERAL 47>,<&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>; | |
| clock-names = "pclk", "hclk", "tx_clk", "tsu_clk"; | |
| assigned-clocks = <&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>; | |
| assigned-clock-rates = <125000000>, <200000000>; | |
| status = "disabled"; | |
| }; | |
| pit64b0: timer@e1800000 { | |
| compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"; | |
| reg = <0xe1800000 0x100>; | |
| interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>; | |
| clock-names = "pclk", "gclk"; | |
| }; | |
| pit64b1: timer@e1804000 { | |
| compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"; | |
| reg = <0xe1804000 0x100>; | |
| interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 67>, <&pmc PMC_TYPE_GCK 67>; | |
| clock-names = "pclk", "gclk"; | |
| }; | |
| pwm: pwm@e1818000 { | |
| compatible = "microchip,sama7d65-pwm", "atmel,sama5d2-pwm"; | |
| reg = <0xe1818000 0x500>; | |
| interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 72>; | |
| #pwm-cells = <3>; | |
| status = "disabled"; | |
| }; | |
| flx0: flexcom@e1820000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe1820000 0x200>; | |
| ranges = <0x0 0xe1820000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart0: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; | |
| clock-names = "usart"; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(5)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi0: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(5)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c0: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| atmel,fifo-size = <32>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(6)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(5)>; | |
| dma-names = "tx", "rx"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx1: flexcom@e1824000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe1824000 0x200>; | |
| ranges = <0x0 0xe1824000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 35>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart1: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 35>; | |
| clock-names = "usart"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(7)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi1: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 35>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(7)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c1: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 35>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(7)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx2: flexcom@e1828000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe1828000 0x200>; | |
| ranges = <0x0 0xe1828000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart2: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; | |
| clock-names = "usart"; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(9)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi2: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(9)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c2: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(9)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx3: flexcom@e182c000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe182c000 0x200>; | |
| ranges = <0x0 0xe182c000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart3: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; | |
| clock-names = "usart"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(11)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi3: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(11)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c3: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(11)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx4: flexcom@e2018000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe2018000 0x200>; | |
| ranges = <0x0 0xe2018000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart4: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; | |
| clock-names = "usart"; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(13)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi4: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(13)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c4: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(13)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx5: flexcom@e201c000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe201c000 0x200>; | |
| ranges = <0x0 0xe201c000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart5: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; | |
| clock-names = "usart"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(15)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi5: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(15)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c5: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(15)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx6: flexcom@e2020000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe2020000 0x200>; | |
| ranges = <0x0 0xe2020000 0x800>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; | |
| status = "disabled"; | |
| uart6: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; | |
| clock-names = "usart"; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(18)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(17)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| spi6: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(18)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(17)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c6: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(18)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(17)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx7: flexcom@e2024000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe2024000 0x200>; | |
| ranges = <0x0 0xe2024000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart7: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; | |
| clock-names = "usart"; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(19)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi7: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(19)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c7: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>, | |
| <&dma1 AT91_XDMAC_DT_PERID(19)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx8: flexcom@e281c000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe281c000 0x200>; | |
| ranges = <0x0 0xe281c000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart8: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; | |
| clock-names = "usart"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(21)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi8: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(21)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c8: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(21)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx9: flexcom@e2820000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe2820000 0x200>; | |
| ranges = <0x0 0xe2820000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart9: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; | |
| clock-names = "usart"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(23)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi9: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(23)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c9: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(23)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| flx10: flexcom@e2824000 { | |
| compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; | |
| reg = <0xe2824000 0x200>; | |
| ranges = <0x0 0xe2824000 0x800>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| status = "disabled"; | |
| uart10: serial@200 { | |
| compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; | |
| reg = <0x200 0x200>; | |
| interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; | |
| clock-names = "usart"; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(26)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(25)>; | |
| dma-names = "tx", "rx"; | |
| atmel,use-dma-rx; | |
| atmel,use-dma-tx; | |
| atmel,fifo-size = <32>; | |
| atmel,usart-mode = <AT91_USART_MODE_SERIAL>; | |
| status = "disabled"; | |
| }; | |
| spi10: spi@400 { | |
| compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; | |
| reg = <0x400 0x200>; | |
| interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; | |
| clock-names = "spi_clk"; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| dmas = <&dma0 AT91_XDMAC_DT_PERID(26)>, | |
| <&dma0 AT91_XDMAC_DT_PERID(25)>; | |
| dma-names = "tx", "rx"; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| i2c10: i2c@600 { | |
| compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; | |
| reg = <0x600 0x200>; | |
| interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| atmel,fifo-size = <32>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| uddrc: uddrc@e3800000 { | |
| compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc"; | |
| reg = <0xe3800000 0x4000>; | |
| }; | |
| ddr3phy: ddr3phy@e3804000 { | |
| compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy"; | |
| reg = <0xe3804000 0x1000>; | |
| }; | |
| gic: interrupt-controller@e8c11000 { | |
| compatible = "arm,cortex-a7-gic"; | |
| reg = <0xe8c11000 0x1000>, | |
| <0xe8c12000 0x2000>; | |
| #interrupt-cells = <3>; | |
| #address-cells = <0>; | |
| interrupt-controller; | |
| }; | |
| i3c: i3c@e9000000 { | |
| compatible = "microchip,sama7d65-i3c-hci"; | |
| reg = <0xe9000000 0x300>; | |
| interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&pmc PMC_TYPE_PERIPHERAL 105>, <&pmc PMC_TYPE_GCK 105>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| }; |