| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: MediaTek Smart Voltage Scaling (SVS) | |
| maintainers: | |
| - Roger Lu <roger.lu@mediatek.com> | |
| - Matthias Brugger <matthias.bgg@gmail.com> | |
| - Kevin Hilman <khilman@kernel.org> | |
| description: |+ | |
| The SVS engine is a piece of hardware which has several | |
| controllers(banks) for calculating suitable voltage to | |
| different power domains(CPU/GPU/CCI) according to | |
| chip process corner, temperatures and other factors. Then DVFS | |
| driver could apply SVS bank voltage to PMIC/Buck. | |
| properties: | |
| compatible: | |
| enum: | |
| - mediatek,mt8183-svs | |
| - mediatek,mt8186-svs | |
| - mediatek,mt8188-svs | |
| - mediatek,mt8192-svs | |
| - mediatek,mt8195-svs | |
| reg: | |
| maxItems: 1 | |
| description: Address range of the MTK SVS controller. | |
| interrupts: | |
| maxItems: 1 | |
| clocks: | |
| maxItems: 1 | |
| description: Main clock for MTK SVS controller to work. | |
| clock-names: | |
| const: main | |
| nvmem-cells: | |
| minItems: 1 | |
| description: | |
| Phandle to the calibration data provided by a nvmem device. | |
| items: | |
| - description: SVS efuse for SVS controller | |
| - description: Thermal efuse for SVS controller | |
| nvmem-cell-names: | |
| items: | |
| - const: svs-calibration-data | |
| - const: t-calibration-data | |
| resets: | |
| maxItems: 1 | |
| reset-names: | |
| items: | |
| - const: svs_rst | |
| required: | |
| - compatible | |
| - reg | |
| - interrupts | |
| - clocks | |
| - clock-names | |
| - nvmem-cells | |
| - nvmem-cell-names | |
| additionalProperties: false | |
| examples: | |
| - | | |
| #include <dt-bindings/clock/mt8183-clk.h> | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| #include <dt-bindings/interrupt-controller/irq.h> | |
| soc { | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| svs@1100b000 { | |
| compatible = "mediatek,mt8183-svs"; | |
| reg = <0 0x1100b000 0 0x1000>; | |
| interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>; | |
| clocks = <&infracfg CLK_INFRA_THERM>; | |
| clock-names = "main"; | |
| nvmem-cells = <&svs_calibration>, <&thermal_calibration>; | |
| nvmem-cell-names = "svs-calibration-data", "t-calibration-data"; | |
| }; | |
| }; |