Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mutex.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek Mute-X

maintainers:
  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  - Philipp Zabel <p.zabel@pengutronix.de>

description:
  MediaTek Mute-X, namely MUTEX, is used to "mute" or "unmute" trigger signals
  like Start Of Frame (SOF), End Of Frame (EOF), Tearing Effect (TE / VSYNC)
  and others to each hardware sub-modules in the Display Controller IP or in
  the Media Data Path (MDP) IP.
  In some SoCs like MT2701, this hardware module may feature functionality
  to, for example, protect shadow registers by blocking auto write triggers
  upon operation (usually frame push) completion.
  MUTEX device node must be siblings to the central MMSYS_CONFIG node.
  For a description of the MMSYS_CONFIG binding, see
  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
  for details.

properties:
  compatible:
    enum:
      - mediatek,mt2701-disp-mutex
      - mediatek,mt2712-disp-mutex
      - mediatek,mt6795-disp-mutex
      - mediatek,mt8167-disp-mutex
      - mediatek,mt8173-disp-mutex
      - mediatek,mt8183-disp-mutex
      - mediatek,mt8186-disp-mutex
      - mediatek,mt8186-mdp3-mutex
      - mediatek,mt8188-disp-mutex
      - mediatek,mt8188-vpp-mutex
      - mediatek,mt8192-disp-mutex
      - mediatek,mt8195-disp-mutex
      - mediatek,mt8195-vpp-mutex
      - mediatek,mt8365-disp-mutex

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  power-domains:
    description: A phandle and PM domain specifier as defined by bindings of
      the power controller specified by phandle. See
      Documentation/devicetree/bindings/power/power-domain.yaml for details.

  clocks:
    items:
      - description: MUTEX Clock

  mediatek,gce-events:
    description:
      The event id which is mapping to the specific hardware event signal
      to gce. The event id is defined in the gce header
      include/dt-bindings/gce/<chip>-gce.h of each chips.
    $ref: /schemas/types.yaml#/definitions/uint32-array

  mediatek,gce-client-reg:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      items:
        - description: phandle of GCE
        - description: GCE subsys id
        - description: register offset
        - description: register size
    description: The register of client driver can be configured by gce with
      4 arguments defined in this property. Each GCE subsys id is mapping to
      a client defined in the header include/dt-bindings/gce/<chip>-gce.h.

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - mediatek,mt2701-disp-mutex
              - mediatek,mt2712-disp-mutex
              - mediatek,mt6795-disp-mutex
              - mediatek,mt8173-disp-mutex
              - mediatek,mt8186-disp-mutex
              - mediatek,mt8186-mdp3-mutex
              - mediatek,mt8192-disp-mutex
              - mediatek,mt8195-disp-mutex
    then:
      required:
        - clocks

required:
  - compatible
  - reg
  - interrupts
  - power-domains

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/mt8173-clk.h>
    #include <dt-bindings/power/mt8173-power.h>
    #include <dt-bindings/gce/mt8173-gce.h>

    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        mutex: mutex@14020000 {
            compatible = "mediatek,mt8173-disp-mutex";
            reg = <0 0x14020000 0 0x1000>;
            interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;
            power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
            clocks = <&mmsys CLK_MM_MUTEX_32K>;
            mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
                                  <CMDQ_EVENT_MUTEX1_STREAM_EOF>;
        };
    };