| # SPDX-License-Identifier: GPL-2.0 | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/net/smsc,lan91c111.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller | |
| maintainers: | |
| - Nicolas Pitre <nico@fluxnic.net> | |
| allOf: | |
| - $ref: ethernet-controller.yaml# | |
| properties: | |
| compatible: | |
| const: smsc,lan91c111 | |
| reg: | |
| maxItems: 1 | |
| interrupts: | |
| maxItems: 1 | |
| reg-shift: true | |
| reg-io-width: | |
| enum: [ 1, 2, 4 ] | |
| default: 4 | |
| reset-gpios: | |
| description: GPIO connected to control RESET pin | |
| maxItems: 1 | |
| power-gpios: | |
| description: GPIO connect to control PWRDWN pin | |
| maxItems: 1 | |
| pxa-u16-align4: | |
| description: put in place the workaround the force all u16 writes to be | |
| 32 bits aligned | |
| type: boolean | |
| required: | |
| - compatible | |
| - reg | |
| - interrupts | |
| unevaluatedProperties: false | |
| examples: | |
| - | | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| ethernet@4010000 { | |
| compatible = "smsc,lan91c111"; | |
| reg = <0x40100000 0x10000>; | |
| phy-mode = "mii"; | |
| interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
| reg-io-width = <2>; | |
| }; |