| # SPDX-License-Identifier: GPL-2.0 | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/net/rockchip,emac.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC) | |
| maintainers: | |
| - Heiko Stuebner <heiko@sntech.de> | |
| properties: | |
| compatible: | |
| enum: | |
| - rockchip,rk3036-emac | |
| - rockchip,rk3066-emac | |
| - rockchip,rk3188-emac | |
| reg: | |
| maxItems: 1 | |
| interrupts: | |
| maxItems: 1 | |
| clocks: | |
| minItems: 2 | |
| items: | |
| - description: host clock | |
| - description: reference clock | |
| - description: mac TX/RX clock | |
| clock-names: | |
| minItems: 2 | |
| items: | |
| - const: hclk | |
| - const: macref | |
| - const: macclk | |
| rockchip,grf: | |
| $ref: /schemas/types.yaml#/definitions/phandle | |
| description: | |
| Phandle to the syscon GRF used to control speed and mode for the EMAC. | |
| phy-supply: | |
| description: | |
| Phandle to a regulator if the PHY needs one. | |
| mdio: | |
| $ref: mdio.yaml# | |
| unevaluatedProperties: false | |
| required: | |
| - compatible | |
| - reg | |
| - interrupts | |
| - clocks | |
| - clock-names | |
| - rockchip,grf | |
| - phy | |
| - phy-mode | |
| - mdio | |
| allOf: | |
| - $ref: ethernet-controller.yaml# | |
| - if: | |
| properties: | |
| compatible: | |
| contains: | |
| const: rockchip,rk3036-emac | |
| then: | |
| properties: | |
| clocks: | |
| minItems: 3 | |
| clock-names: | |
| minItems: 3 | |
| else: | |
| properties: | |
| clocks: | |
| maxItems: 2 | |
| clock-names: | |
| maxItems: 2 | |
| unevaluatedProperties: false | |
| examples: | |
| - | | |
| #include <dt-bindings/clock/rk3188-cru-common.h> | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| ethernet@10204000 { | |
| compatible = "rockchip,rk3188-emac"; | |
| reg = <0xc0fc2000 0x3c>; | |
| interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>; | |
| clock-names = "hclk", "macref"; | |
| rockchip,grf = <&grf>; | |
| pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; | |
| pinctrl-names = "default"; | |
| phy = <&phy0>; | |
| phy-mode = "rmii"; | |
| phy-supply = <&vcc_rmii>; | |
| mdio { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| phy0: ethernet-phy@0 { | |
| reg = <1>; | |
| }; | |
| }; | |
| }; |