| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: Microchip Lan966x Ethernet switch controller | |
| maintainers: | |
| - Horatiu Vultur <horatiu.vultur@microchip.com> | |
| description: | | |
| The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with | |
| two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs, | |
| it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to | |
| 2 Quad-SGMII/Quad-USGMII interfaces. | |
| properties: | |
| $nodename: | |
| pattern: "^(ethernet-)?switch@[0-9a-f]+$" | |
| compatible: | |
| const: microchip,lan966x-switch | |
| reg: | |
| items: | |
| - description: cpu target | |
| - description: general control block target | |
| reg-names: | |
| items: | |
| - const: cpu | |
| - const: gcb | |
| interrupts: | |
| minItems: 1 | |
| items: | |
| - description: register based extraction | |
| - description: frame dma based extraction | |
| - description: analyzer interrupt | |
| - description: ptp interrupt | |
| - description: ptp external interrupt | |
| interrupt-names: | |
| minItems: 1 | |
| items: | |
| - const: xtr | |
| - const: fdma | |
| - const: ana | |
| - const: ptp | |
| - const: ptp-ext | |
| resets: | |
| items: | |
| - description: Reset controller used for switch core reset (soft reset) | |
| reset-names: | |
| items: | |
| - const: switch | |
| ethernet-ports: | |
| type: object | |
| properties: | |
| '#address-cells': | |
| const: 1 | |
| '#size-cells': | |
| const: 0 | |
| additionalProperties: false | |
| patternProperties: | |
| "^(ethernet-)?port@[0-9a-f]+$": | |
| type: object | |
| $ref: /schemas/net/ethernet-controller.yaml# | |
| unevaluatedProperties: false | |
| properties: | |
| '#address-cells': | |
| const: 1 | |
| '#size-cells': | |
| const: 0 | |
| reg: | |
| description: | |
| Switch port number | |
| phys: | |
| description: | |
| Phandle of a Ethernet SerDes PHY | |
| phy-mode: | |
| description: | |
| This specifies the interface used by the Ethernet SerDes towards | |
| the PHY or SFP. | |
| enum: | |
| - gmii | |
| - sgmii | |
| - qsgmii | |
| - 1000base-x | |
| - 2500base-x | |
| phy-handle: | |
| description: | |
| Phandle of a Ethernet PHY. | |
| sfp: | |
| description: | |
| Phandle of an SFP. | |
| managed: true | |
| required: | |
| - reg | |
| - phys | |
| - phy-mode | |
| oneOf: | |
| - required: | |
| - phy-handle | |
| - required: | |
| - sfp | |
| - managed | |
| required: | |
| - compatible | |
| - reg | |
| - reg-names | |
| - interrupts | |
| - interrupt-names | |
| - resets | |
| - reset-names | |
| - ethernet-ports | |
| additionalProperties: false | |
| examples: | |
| - | | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| switch: ethernet-switch@e0000000 { | |
| compatible = "microchip,lan966x-switch"; | |
| reg = <0xe0000000 0x0100000>, | |
| <0xe2000000 0x0800000>; | |
| reg-names = "cpu", "gcb"; | |
| interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-names = "xtr"; | |
| resets = <&switch_reset 0>; | |
| reset-names = "switch"; | |
| ethernet-ports { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| port0: ethernet-port@0 { | |
| reg = <0>; | |
| phy-handle = <&phy0>; | |
| phys = <&serdes 0 0>; | |
| phy-mode = "gmii"; | |
| }; | |
| port1: ethernet-port@1 { | |
| reg = <1>; | |
| sfp = <&sfp_eth1>; | |
| managed = "in-band-status"; | |
| phys = <&serdes 2 4>; | |
| phy-mode = "sgmii"; | |
| }; | |
| }; | |
| }; | |
| ... |