| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/interrupt-controller/ti,irq-crossbar.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: Texas Instruments IRQ Crossbar | |
| maintainers: | |
| - Sricharan R <r.sricharan@ti.com> | |
| description: | |
| Some socs have a large number of interrupts requests to service the needs of | |
| its many peripherals and subsystems. All of the interrupt lines from the | |
| subsystems are not needed at the same time, so they have to be muxed to the | |
| irq-controller appropriately. In such places a interrupt controllers are | |
| preceded by an CROSSBAR that provides flexibility in muxing the device | |
| requests to the controller inputs. | |
| properties: | |
| compatible: | |
| const: ti,irq-crossbar | |
| reg: | |
| maxItems: 1 | |
| interrupt-controller: true | |
| '#interrupt-cells': | |
| const: 3 | |
| ti,max-irqs: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| Total number of irqs available at the parent interrupt controller. | |
| minimum: 1 | |
| ti,max-crossbar-sources: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| Maximum number of crossbar sources that can be routed. | |
| minimum: 1 | |
| ti,reg-size: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| Size of a individual register in bytes. Every individual | |
| register is assumed to be of same size. | |
| enum: [1, 2, 4] | |
| ti,irqs-reserved: | |
| $ref: /schemas/types.yaml#/definitions/uint32-array | |
| description: | |
| List of the reserved irq lines that are not muxed using crossbar. These | |
| interrupt lines are reserved in the soc, so crossbar bar driver should not | |
| consider them as free lines. | |
| ti,irqs-skip: | |
| $ref: /schemas/types.yaml#/definitions/uint32-array | |
| description: | |
| Similar to "ti,irqs-reserved", but these are for SOC-specific hard-wiring | |
| of those irqs which unexpectedly bypasses the crossbar. These irqs have a | |
| crossbar register, but still cannot be used. | |
| ti,irqs-safe-map: | |
| $ref: /schemas/types.yaml#/definitions/uint32 | |
| description: | |
| integer which maps to a safe configuration to use when the interrupt | |
| controller irq is unused. | |
| default: 0 | |
| required: | |
| - compatible | |
| - reg | |
| - interrupt-controller | |
| - '#interrupt-cells' | |
| - ti,max-irqs | |
| - ti,max-crossbar-sources | |
| - ti,reg-size | |
| - ti,irqs-reserved | |
| additionalProperties: false | |
| examples: | |
| - | | |
| crossbar@4a002a48 { | |
| compatible = "ti,irq-crossbar"; | |
| reg = <0x4a002a48 0x130>; | |
| interrupt-controller; | |
| #interrupt-cells = <3>; | |
| ti,max-irqs = <160>; | |
| ti,max-crossbar-sources = <400>; | |
| ti,reg-size = <2>; | |
| ti,irqs-reserved = <0 1 2 3 5 6 131 132>; | |
| ti,irqs-skip = <10 133 139 140>; | |
| }; |