| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/interrupt-controller/starfive,jhb100-intc.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: StarFive External Interrupt Controller | |
| description: | |
| StarFive SoC JHB100 contain a external interrupt controller. It can be used | |
| to handle high-level input interrupt signals. It also send the output | |
| interrupt signal to RISC-V PLIC. | |
| maintainers: | |
| - Changhuang Liang <changhuang.liang@starfivetech.com> | |
| properties: | |
| compatible: | |
| const: starfive,jhb100-intc | |
| reg: | |
| maxItems: 1 | |
| interrupts: | |
| maxItems: 1 | |
| interrupt-controller: true | |
| "#interrupt-cells": | |
| const: 1 | |
| required: | |
| - compatible | |
| - reg | |
| - interrupts | |
| - interrupt-controller | |
| - "#interrupt-cells" | |
| additionalProperties: false | |
| examples: | |
| - | | |
| interrupt-controller@12260000 { | |
| compatible = "starfive,jhb100-intc"; | |
| reg = <0x12260000 0x10000>; | |
| interrupts = <45>; | |
| interrupt-controller; | |
| #interrupt-cells = <1>; | |
| }; |