| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com> |
| */ |
| |
| /dts-v1/; |
| #include "loongson1.dtsi" |
| |
| / { |
| clkc: clock-controller@1fe78030 { |
| compatible = "loongson,ls1c-clk"; |
| reg = <0x1fe78030 0x8>; |
| clocks = <&xtal>; |
| #clock-cells = <1>; |
| }; |
| }; |
| |
| &soc { |
| syscon: syscon@420 { |
| compatible = "loongson,ls1c-syscon", "syscon"; |
| reg = <0x420 0x8>; |
| }; |
| |
| intc4: interrupt-controller@10a0 { |
| compatible = "loongson,ls1x-intc"; |
| reg = <0x10a0 0x18>; |
| interrupt-controller; |
| interrupt-parent = <&cpu_intc>; |
| interrupts = <6>; |
| #interrupt-cells = <2>; |
| }; |
| |
| gpio2: gpio@10c8 { |
| compatible = "loongson,ls1x-gpio"; |
| reg = <0x10c8 0x4>; |
| gpio-controller; |
| ngpios = <32>; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio3: gpio@10cc { |
| compatible = "loongson,ls1x-gpio"; |
| reg = <0x10cc 0x4>; |
| gpio-controller; |
| ngpios = <32>; |
| #gpio-cells = <2>; |
| }; |
| |
| dma: dma-controller@1160 { |
| compatible = "loongson,ls1c-apbdma", "loongson,ls1b-apbdma"; |
| reg = <0x1160 0x4>; |
| interrupt-parent = <&intc0>; |
| interrupts = <13 IRQ_TYPE_EDGE_RISING>, |
| <14 IRQ_TYPE_EDGE_RISING>, |
| <15 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "ch0", "ch1", "ch2"; |
| #dma-cells = <1>; |
| }; |
| |
| emac: ethernet@110000 { |
| compatible = "loongson,ls1c-emac", "snps,dwmac-3.50a"; |
| reg = <0x110000 0x10000>; |
| clocks = <&clkc LS1X_CLKID_AHB>; |
| clock-names = "stmmaceth"; |
| interrupt-parent = <&intc1>; |
| interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "macirq"; |
| loongson,ls1-syscon = <&syscon>; |
| snps,pbl = <1>; |
| status = "disabled"; |
| }; |
| |
| ehci: usb@120000 { |
| compatible = "generic-ehci"; |
| reg = <0x120000 0x100>; |
| interrupt-parent = <&intc1>; |
| interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| ohci: usb@128000 { |
| compatible = "generic-ohci"; |
| reg = <0x128000 0x100>; |
| interrupt-parent = <&intc1>; |
| interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| }; |
| |
| &apb { |
| watchdog: watchdog@1c060 { |
| compatible = "loongson,ls1c-wdt"; |
| reg = <0x1c060 0xc>; |
| clocks = <&clkc LS1X_CLKID_APB>; |
| status = "disabled"; |
| }; |
| |
| rtc: rtc@24000 { |
| compatible = "loongson,ls1c-rtc"; |
| reg = <0x24000 0x78>; |
| status = "disabled"; |
| }; |
| |
| nand: nand-controller@38000 { |
| compatible = "loongson,ls1c-nand-controller"; |
| reg = <0x38000 0x24>, <0x38040 0x4>; |
| reg-names = "nand", "nand-dma"; |
| dmas = <&dma 0>; |
| dma-names = "rxtx"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| |
| nand@0 { |
| reg = <0>; |
| label = "ls1x-nand"; |
| nand-use-soft-ecc-engine; |
| nand-ecc-algo = "hamming"; |
| }; |
| }; |
| }; |
| |
| &gpio0 { |
| ngpios = <32>; |
| }; |
| |
| &gpio1 { |
| ngpios = <32>; |
| }; |
| |
| &uart1 { |
| interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &uart2 { |
| interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &uart3 { |
| interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
