| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ | |
| /* | |
| * Copyright (c) 2025 Collabora Ltd. | |
| * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | |
| */ | |
| #ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8196_H | |
| #define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8196_H | |
| #define SLAVE_DDR_EMI 0 | |
| #define MASTER_MCUSYS 1 | |
| #define MASTER_MCU_0 2 | |
| #define MASTER_MCU_1 3 | |
| #define MASTER_MCU_2 4 | |
| #define MASTER_MCU_3 5 | |
| #define MASTER_MCU_4 6 | |
| #define MASTER_GPUSYS 7 | |
| #define MASTER_MMSYS 8 | |
| #define MASTER_MM_VPU 9 | |
| #define MASTER_MM_DISP 10 | |
| #define MASTER_MM_VDEC 11 | |
| #define MASTER_MM_VENC 12 | |
| #define MASTER_MM_CAM 13 | |
| #define MASTER_MM_IMG 14 | |
| #define MASTER_MM_MDP 15 | |
| #define MASTER_VPUSYS 16 | |
| #define MASTER_VPU_0 17 | |
| #define MASTER_VPU_1 18 | |
| #define MASTER_MDLASYS 19 | |
| #define MASTER_MDLA_0 20 | |
| #define MASTER_UFS 21 | |
| #define MASTER_PCIE 22 | |
| #define MASTER_USB 23 | |
| #define MASTER_WIFI 24 | |
| #define MASTER_BT 25 | |
| #define MASTER_NETSYS 26 | |
| #define MASTER_DBGIF 27 | |
| #define SLAVE_HRT_DDR_EMI 28 | |
| #define MASTER_HRT_MMSYS 29 | |
| #define MASTER_HRT_MM_DISP 30 | |
| #define MASTER_HRT_MM_VDEC 31 | |
| #define MASTER_HRT_MM_VENC 32 | |
| #define MASTER_HRT_MM_CAM 33 | |
| #define MASTER_HRT_MM_IMG 34 | |
| #define MASTER_HRT_MM_MDP 35 | |
| #define MASTER_HRT_ADSP 36 | |
| #define MASTER_HRT_DBGIF 37 | |
| #endif |