| /* SPDX-License-Identifier: GPL-2.0 */ | |
| /* | |
| * Interconnect framework driver for i.MX SoC | |
| * | |
| * Copyright (c) 2019-2020, NXP | |
| */ | |
| #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MQ_H | |
| #define __DT_BINDINGS_INTERCONNECT_IMX8MQ_H | |
| #define IMX8MQ_ICN_NOC 1 | |
| #define IMX8MQ_ICS_DRAM 2 | |
| #define IMX8MQ_ICS_OCRAM 3 | |
| #define IMX8MQ_ICM_A53 4 | |
| #define IMX8MQ_ICM_VPU 5 | |
| #define IMX8MQ_ICN_VIDEO 6 | |
| #define IMX8MQ_ICM_GPU 7 | |
| #define IMX8MQ_ICN_GPU 8 | |
| #define IMX8MQ_ICM_DCSS 9 | |
| #define IMX8MQ_ICN_DCSS 10 | |
| #define IMX8MQ_ICM_USB1 11 | |
| #define IMX8MQ_ICM_USB2 12 | |
| #define IMX8MQ_ICN_USB 13 | |
| #define IMX8MQ_ICM_CSI1 14 | |
| #define IMX8MQ_ICM_CSI2 15 | |
| #define IMX8MQ_ICM_LCDIF 16 | |
| #define IMX8MQ_ICN_DISPLAY 17 | |
| #define IMX8MQ_ICM_SDMA2 18 | |
| #define IMX8MQ_ICN_AUDIO 19 | |
| #define IMX8MQ_ICN_ENET 20 | |
| #define IMX8MQ_ICM_ENET 21 | |
| #define IMX8MQ_ICM_SDMA1 22 | |
| #define IMX8MQ_ICM_NAND 23 | |
| #define IMX8MQ_ICM_USDHC1 24 | |
| #define IMX8MQ_ICM_USDHC2 25 | |
| #define IMX8MQ_ICM_PCIE1 26 | |
| #define IMX8MQ_ICM_PCIE2 27 | |
| #define IMX8MQ_ICN_MAIN 28 | |
| #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MQ_H */ |