| /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| /* | |
| * Copyright 2023-2024 Rivos, Inc | |
| */ | |
| #ifndef _UAPI_ASM_HWPROBE_H | |
| #define _UAPI_ASM_HWPROBE_H | |
| #include <linux/types.h> | |
| #include <linux/const.h> | |
| /* | |
| * Interface for probing hardware capabilities from userspace, see | |
| * Documentation/arch/riscv/hwprobe.rst for more information. | |
| */ | |
| struct riscv_hwprobe { | |
| __s64 key; | |
| __u64 value; | |
| }; | |
| #define RISCV_HWPROBE_KEY_MVENDORID 0 | |
| #define RISCV_HWPROBE_KEY_MARCHID 1 | |
| #define RISCV_HWPROBE_KEY_MIMPID 2 | |
| #define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3 | |
| #define RISCV_HWPROBE_BASE_BEHAVIOR_IMA _BITULL(0) | |
| #define RISCV_HWPROBE_KEY_IMA_EXT_0 4 | |
| #define RISCV_HWPROBE_IMA_FD _BITULL(0) | |
| #define RISCV_HWPROBE_IMA_C _BITULL(1) | |
| #define RISCV_HWPROBE_IMA_V _BITULL(2) | |
| #define RISCV_HWPROBE_EXT_ZBA _BITULL(3) | |
| #define RISCV_HWPROBE_EXT_ZBB _BITULL(4) | |
| #define RISCV_HWPROBE_EXT_ZBS _BITULL(5) | |
| #define RISCV_HWPROBE_EXT_ZICBOZ _BITULL(6) | |
| #define RISCV_HWPROBE_EXT_ZBC _BITULL(7) | |
| #define RISCV_HWPROBE_EXT_ZBKB _BITULL(8) | |
| #define RISCV_HWPROBE_EXT_ZBKC _BITULL(9) | |
| #define RISCV_HWPROBE_EXT_ZBKX _BITULL(10) | |
| #define RISCV_HWPROBE_EXT_ZKND _BITULL(11) | |
| #define RISCV_HWPROBE_EXT_ZKNE _BITULL(12) | |
| #define RISCV_HWPROBE_EXT_ZKNH _BITULL(13) | |
| #define RISCV_HWPROBE_EXT_ZKSED _BITULL(14) | |
| #define RISCV_HWPROBE_EXT_ZKSH _BITULL(15) | |
| #define RISCV_HWPROBE_EXT_ZKT _BITULL(16) | |
| #define RISCV_HWPROBE_EXT_ZVBB _BITULL(17) | |
| #define RISCV_HWPROBE_EXT_ZVBC _BITULL(18) | |
| #define RISCV_HWPROBE_EXT_ZVKB _BITULL(19) | |
| #define RISCV_HWPROBE_EXT_ZVKG _BITULL(20) | |
| #define RISCV_HWPROBE_EXT_ZVKNED _BITULL(21) | |
| #define RISCV_HWPROBE_EXT_ZVKNHA _BITULL(22) | |
| #define RISCV_HWPROBE_EXT_ZVKNHB _BITULL(23) | |
| #define RISCV_HWPROBE_EXT_ZVKSED _BITULL(24) | |
| #define RISCV_HWPROBE_EXT_ZVKSH _BITULL(25) | |
| #define RISCV_HWPROBE_EXT_ZVKT _BITULL(26) | |
| #define RISCV_HWPROBE_EXT_ZFH _BITULL(27) | |
| #define RISCV_HWPROBE_EXT_ZFHMIN _BITULL(28) | |
| #define RISCV_HWPROBE_EXT_ZIHINTNTL _BITULL(29) | |
| #define RISCV_HWPROBE_EXT_ZVFH _BITULL(30) | |
| #define RISCV_HWPROBE_EXT_ZVFHMIN _BITULL(31) | |
| #define RISCV_HWPROBE_EXT_ZFA _BITULL(32) | |
| #define RISCV_HWPROBE_EXT_ZTSO _BITULL(33) | |
| #define RISCV_HWPROBE_EXT_ZACAS _BITULL(34) | |
| #define RISCV_HWPROBE_EXT_ZICOND _BITULL(35) | |
| #define RISCV_HWPROBE_EXT_ZIHINTPAUSE _BITULL(36) | |
| #define RISCV_HWPROBE_EXT_ZVE32X _BITULL(37) | |
| #define RISCV_HWPROBE_EXT_ZVE32F _BITULL(38) | |
| #define RISCV_HWPROBE_EXT_ZVE64X _BITULL(39) | |
| #define RISCV_HWPROBE_EXT_ZVE64F _BITULL(40) | |
| #define RISCV_HWPROBE_EXT_ZVE64D _BITULL(41) | |
| #define RISCV_HWPROBE_EXT_ZIMOP _BITULL(42) | |
| #define RISCV_HWPROBE_EXT_ZCA _BITULL(43) | |
| #define RISCV_HWPROBE_EXT_ZCB _BITULL(44) | |
| #define RISCV_HWPROBE_EXT_ZCD _BITULL(45) | |
| #define RISCV_HWPROBE_EXT_ZCF _BITULL(46) | |
| #define RISCV_HWPROBE_EXT_ZCMOP _BITULL(47) | |
| #define RISCV_HWPROBE_EXT_ZAWRS _BITULL(48) | |
| #define RISCV_HWPROBE_EXT_SUPM _BITULL(49) | |
| #define RISCV_HWPROBE_EXT_ZICNTR _BITULL(50) | |
| #define RISCV_HWPROBE_EXT_ZIHPM _BITULL(51) | |
| #define RISCV_HWPROBE_EXT_ZFBFMIN _BITULL(52) | |
| #define RISCV_HWPROBE_EXT_ZVFBFMIN _BITULL(53) | |
| #define RISCV_HWPROBE_EXT_ZVFBFWMA _BITULL(54) | |
| #define RISCV_HWPROBE_EXT_ZICBOM _BITULL(55) | |
| #define RISCV_HWPROBE_EXT_ZAAMO _BITULL(56) | |
| #define RISCV_HWPROBE_EXT_ZALRSC _BITULL(57) | |
| #define RISCV_HWPROBE_EXT_ZABHA _BITULL(58) | |
| #define RISCV_HWPROBE_EXT_ZALASR _BITULL(59) | |
| #define RISCV_HWPROBE_EXT_ZICBOP _BITULL(60) | |
| #define RISCV_HWPROBE_EXT_ZILSD _BITULL(61) | |
| #define RISCV_HWPROBE_EXT_ZCLSD _BITULL(62) | |
| #define RISCV_HWPROBE_EXT_ZICFILP _BITULL(63) | |
| #define RISCV_HWPROBE_KEY_CPUPERF_0 5 | |
| #define RISCV_HWPROBE_MISALIGNED_UNKNOWN 0 | |
| #define RISCV_HWPROBE_MISALIGNED_EMULATED 1 | |
| #define RISCV_HWPROBE_MISALIGNED_SLOW 2 | |
| #define RISCV_HWPROBE_MISALIGNED_FAST 3 | |
| #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED 4 | |
| #define RISCV_HWPROBE_MISALIGNED_MASK 7 | |
| #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 | |
| #define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7 | |
| #define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8 | |
| #define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF 9 | |
| #define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0 | |
| #define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1 | |
| #define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2 | |
| #define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3 | |
| #define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4 | |
| #define RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF 10 | |
| #define RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN 0 | |
| #define RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW 2 | |
| #define RISCV_HWPROBE_MISALIGNED_VECTOR_FAST 3 | |
| #define RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED 4 | |
| #define RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0 11 | |
| #define RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE 12 | |
| #define RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0 13 | |
| #define RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0 14 | |
| #define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE 15 | |
| #define RISCV_HWPROBE_KEY_IMA_EXT_1 16 | |
| #define RISCV_HWPROBE_EXT_ZICFISS _BITULL(0) | |
| #define RISCV_HWPROBE_EXT_ZICCLSM _BITULL(1) | |
| #define RISCV_HWPROBE_EXT_ZICCAMOA _BITULL(2) | |
| #define RISCV_HWPROBE_EXT_ZICCIF _BITULL(3) | |
| #define RISCV_HWPROBE_EXT_ZICCRSE _BITULL(4) | |
| #define RISCV_HWPROBE_EXT_ZA64RS _BITULL(5) | |
| /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ | |
| /* Flags */ | |
| #define RISCV_HWPROBE_WHICH_CPUS _BITUL(0) | |
| #endif |