| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: NVIDIA Tegra186 xHCI controller | |
| maintainers: | |
| - Thierry Reding <thierry.reding@gmail.com> | |
| - Jon Hunter <jonathanh@nvidia.com> | |
| description: The Tegra xHCI controller supports both USB2 and USB3 interfaces | |
| exposed by the Tegra XUSB pad controller. | |
| properties: | |
| compatible: | |
| const: nvidia,tegra186-xusb | |
| reg: | |
| items: | |
| - description: base and length of the xHCI host registers | |
| - description: base and length of the XUSB FPCI registers | |
| reg-names: | |
| items: | |
| - const: hcd | |
| - const: fpci | |
| interrupts: | |
| items: | |
| - description: xHCI host interrupt | |
| - description: mailbox interrupt | |
| clocks: | |
| items: | |
| - description: XUSB host clock | |
| - description: XUSB Falcon source clock | |
| - description: XUSB SuperSpeed clock | |
| - description: XUSB SuperSpeed source clock | |
| - description: XUSB HighSpeed clock source | |
| - description: XUSB FullSpeed clock source | |
| - description: USB PLL | |
| - description: reference clock | |
| - description: I/O PLL | |
| clock-names: | |
| items: | |
| - const: xusb_host | |
| - const: xusb_falcon_src | |
| - const: xusb_ss | |
| - const: xusb_ss_src | |
| - const: xusb_hs_src | |
| - const: xusb_fs_src | |
| - const: pll_u_480m | |
| - const: clk_m | |
| - const: pll_e | |
| interconnects: | |
| items: | |
| - description: read client | |
| - description: write client | |
| interconnect-names: | |
| items: | |
| - const: dma-mem # read | |
| - const: write | |
| iommus: | |
| maxItems: 1 | |
| nvidia,xusb-padctl: | |
| $ref: /schemas/types.yaml#/definitions/phandle | |
| description: phandle to the XUSB pad controller that is used to configure | |
| the USB pads used by the XHCI controller | |
| phys: | |
| minItems: 1 | |
| maxItems: 7 | |
| phy-names: | |
| minItems: 1 | |
| maxItems: 7 | |
| items: | |
| enum: | |
| - usb2-0 | |
| - usb2-1 | |
| - usb2-2 | |
| - hsic-0 | |
| - usb3-0 | |
| - usb3-1 | |
| - usb3-2 | |
| power-domains: | |
| items: | |
| - description: XUSBC power domain (for Host and USB 2.0) | |
| - description: XUSBA power domain (for SuperSpeed) | |
| power-domain-names: | |
| items: | |
| - const: xusb_host | |
| - const: xusb_ss | |
| dvddio-pex-supply: | |
| description: PCIe/USB3 analog logic power supply. Must supply 1.05 V. | |
| hvddio-pex-supply: | |
| description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V. | |
| avdd-usb-supply: | |
| description: USB controller power supply. Must supply 3.3 V. | |
| avdd-pll-utmip-supply: | |
| description: UTMI PLL power supply. Must supply 1.8 V. | |
| avdd-pll-uerefe-supply: | |
| description: PLLE reference PLL power supply. Must supply 1.05 V. | |
| dvdd-usb-ss-pll-supply: | |
| description: PCIe/USB3 PLL power supply. Must supply 1.05 V. | |
| hvdd-usb-ss-pll-e-supply: | |
| description: High-voltage PLLE power supply. Must supply 1.8 V. | |
| allOf: | |
| - $ref: usb-xhci.yaml | |
| unevaluatedProperties: false | |
| examples: | |
| - | | |
| #include <dt-bindings/clock/tegra186-clock.h> | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| #include <dt-bindings/memory/tegra186-mc.h> | |
| #include <dt-bindings/power/tegra186-powergate.h> | |
| #include <dt-bindings/reset/tegra186-reset.h> | |
| usb@3530000 { | |
| compatible = "nvidia,tegra186-xusb"; | |
| reg = <0x03530000 0x8000>, | |
| <0x03538000 0x1000>; | |
| reg-names = "hcd", "fpci"; | |
| interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>, | |
| <&bpmp TEGRA186_CLK_XUSB_FALCON>, | |
| <&bpmp TEGRA186_CLK_XUSB_SS>, | |
| <&bpmp TEGRA186_CLK_XUSB_CORE_SS>, | |
| <&bpmp TEGRA186_CLK_CLK_M>, | |
| <&bpmp TEGRA186_CLK_XUSB_FS>, | |
| <&bpmp TEGRA186_CLK_PLLU>, | |
| <&bpmp TEGRA186_CLK_CLK_M>, | |
| <&bpmp TEGRA186_CLK_PLLE>; | |
| clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss", | |
| "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", | |
| "pll_u_480m", "clk_m", "pll_e"; | |
| power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>, | |
| <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>; | |
| power-domain-names = "xusb_host", "xusb_ss"; | |
| interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>, | |
| <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>; | |
| interconnect-names = "dma-mem", "write"; | |
| iommus = <&smmu TEGRA186_SID_XUSB_HOST>; | |
| nvidia,xusb-padctl = <&padctl>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb3_0>; | |
| phy-names = "usb2-0", "usb2-1", "usb3-0"; | |
| }; |