| # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: Qualcomm MSM SoC Serial UART | |
| maintainers: | |
| - Bjorn Andersson <andersson@kernel.org> | |
| - Krzysztof Kozlowski <krzk@kernel.org> | |
| description: | |
| The MSM serial UART hardware is designed for low-speed use cases where a | |
| dma-engine isn't needed. From a software perspective it's mostly compatible | |
| with the MSM serial UARTDM except that it only supports reading and writing | |
| one character at a time. | |
| properties: | |
| compatible: | |
| const: qcom,msm-uart | |
| clocks: | |
| maxItems: 1 | |
| clock-names: | |
| items: | |
| - const: core | |
| interrupts: | |
| maxItems: 1 | |
| reg: | |
| maxItems: 1 | |
| required: | |
| - compatible | |
| - clock-names | |
| - clocks | |
| - interrupts | |
| - reg | |
| allOf: | |
| - $ref: /schemas/serial/serial.yaml# | |
| unevaluatedProperties: false | |
| examples: | |
| - | | |
| serial@a9c00000 { | |
| compatible = "qcom,msm-uart"; | |
| reg = <0xa9c00000 0x1000>; | |
| interrupts = <11>; | |
| clocks = <&uart_cxc>; | |
| clock-names = "core"; | |
| }; |