Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm eDP PHY

maintainers:
  - Bjorn Andersson <bjorn.andersson@linaro.org>

description:
  The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
  the physical interface for Embedded Display Port.

properties:
  compatible:
    oneOf:
      - enum:
          - qcom,glymur-dp-phy
          - qcom,sa8775p-edp-phy
          - qcom,sc7280-edp-phy
          - qcom,sc8180x-edp-phy
          - qcom,sc8280xp-dp-phy
          - qcom,sc8280xp-edp-phy
          - qcom,x1e80100-dp-phy
      - items:
          - enum:
              - qcom,qcs8300-edp-phy
          - const: qcom,sa8775p-edp-phy

  reg:
    items:
      - description: PHY base register block
      - description: tx0 register block
      - description: tx1 register block
      - description: PLL register block

  clocks:
    minItems: 2
    maxItems: 3

  clock-names:
    minItems: 2
    items:
      - const: aux
      - const: cfg_ahb
      - const: ref

  "#clock-cells":
    const: 1

  "#phy-cells":
    const: 0

  power-domains:
    maxItems: 1

  vdda-phy-supply: true
  vdda-pll-supply: true

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - "#clock-cells"
  - "#phy-cells"

allOf:
  - if:
      properties:
        compatible:
          enum:
            - qcom,glymur-dp-phy
            - qcom,sa8775p-edp-phy
            - qcom,x1e80100-dp-phy
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          minItems: 3
          maxItems: 3
    else:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          minItems: 2
          maxItems: 2

additionalProperties: false

examples:
  - |
    phy@aec2a00 {
      compatible = "qcom,sc8180x-edp-phy";
      reg = <0x0aec2a00 0x1c0>,
            <0x0aec2200 0xa0>,
            <0x0aec2600 0xa0>,
            <0x0aec2000 0x19c>;

      clocks = <&dispcc 0>, <&dispcc 1>;
      clock-names = "aux", "cfg_ahb";

      #clock-cells = <1>;
      #phy-cells = <0>;

      vdda-phy-supply = <&vdd_a_edp_0_1p2>;
      vdda-pll-supply = <&vdd_a_edp_0_0p9>;
    };
...