| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/mtd/nand-controller.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: NAND Controller Common Properties | |
| maintainers: | |
| - Miquel Raynal <miquel.raynal@bootlin.com> | |
| - Richard Weinberger <richard@nod.at> | |
| description: | | |
| The NAND controller should be represented with its own DT node, and | |
| all NAND chips attached to this controller should be defined as | |
| children nodes of the NAND controller. This representation should be | |
| enforced even for simple controllers supporting only one chip. | |
| select: false | |
| properties: | |
| $nodename: | |
| pattern: "^nand-controller(@.*)?" | |
| "#address-cells": | |
| const: 1 | |
| "#size-cells": | |
| const: 0 | |
| ranges: true | |
| cs-gpios: | |
| description: | |
| Array of chip-select available to the controller. The first | |
| entries are a 1:1 mapping of the available chip-select on the | |
| NAND controller (even if they are not used). As many additional | |
| chip-select as needed may follow and should be phandles of GPIO | |
| lines. 'reg' entries of the NAND chip subnodes become indexes of | |
| this array when this property is present. | |
| minItems: 1 | |
| maxItems: 8 | |
| patternProperties: | |
| "^nand@[a-f0-9]$": | |
| type: object | |
| $ref: raw-nand-chip.yaml# | |
| required: | |
| - "#address-cells" | |
| - "#size-cells" | |
| # This is a generic file other binding inherit from and extend | |
| additionalProperties: true | |
| examples: | |
| - | | |
| nand-controller { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cs-gpios = <0>, <&gpioA 1>; /* A single native CS is available */ | |
| /* controller specific properties */ | |
| nand@0 { | |
| reg = <0>; /* Native CS */ | |
| /* NAND chip specific properties */ | |
| }; | |
| nand@1 { | |
| reg = <1>; /* GPIO CS */ | |
| }; | |
| }; |