Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Aspeed Coprocessor Vectored Interrupt Controller

maintainers:
  - Andrew Jeffery <andrew@codeconstruct.com.au>

description:
  The Aspeed AST2400 and AST2500 SoCs have a controller that provides interrupts
  to the ColdFire coprocessor. It's not a normal interrupt controller and it
  would be rather inconvenient to create an interrupt tree for it, as it
  somewhat shares some of the same sources as the main ARM interrupt controller
  but with different numbers.

  The AST2500 also supports a software generated interrupt.

properties:
  compatible:
    items:
      - enum:
          - aspeed,ast2400-cvic
          - aspeed,ast2500-cvic
      - const: aspeed,cvic

  reg:
    maxItems: 1

  valid-sources:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    maxItems: 1
    description:
      A bitmap of supported sources for the implementation.

  copro-sw-interrupts:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 1
    maxItems: 32
    description:
      A list of interrupt numbers that can be used as software interrupts from
      the ARM to the coprocessor.

required:
  - compatible
  - reg
  - valid-sources

additionalProperties: false

examples:
  - |
    interrupt-controller@1e6c2000 {
        compatible = "aspeed,ast2500-cvic", "aspeed,cvic";
        reg = <0x1e6c2000 0x80>;
        valid-sources = <0xffffffff>;
        copro-sw-interrupts = <1>;
    };