| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| # Copyright (c) 2020 MediaTek Inc. | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: SMI (Smart Multimedia Interface) Common | |
| maintainers: | |
| - Yong Wu <yong.wu@mediatek.com> | |
| description: | | |
| The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml | |
| MediaTek SMI have two generations of HW architecture, here is the list | |
| which generation the SoCs use: | |
| generation 1: mt2701 and mt7623. | |
| generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195. | |
| There's slight differences between the two SMI, for generation 2, the | |
| register which control the iommu port is at each larb's register base. But | |
| for generation 1, the register is at smi ao base(smi always on register | |
| base). Besides that, the smi async clock should be prepared and enabled for | |
| SMI generation 1 to transform the smi clock into emi clock domain, but that is | |
| not needed for SMI generation 2. | |
| properties: | |
| compatible: | |
| oneOf: | |
| - enum: | |
| - mediatek,mt2701-smi-common | |
| - mediatek,mt2712-smi-common | |
| - mediatek,mt6779-smi-common | |
| - mediatek,mt6795-smi-common | |
| - mediatek,mt6893-smi-common | |
| - mediatek,mt8167-smi-common | |
| - mediatek,mt8173-smi-common | |
| - mediatek,mt8183-smi-common | |
| - mediatek,mt8186-smi-common | |
| - mediatek,mt8188-smi-common-vdo | |
| - mediatek,mt8188-smi-common-vpp | |
| - mediatek,mt8192-smi-common | |
| - mediatek,mt8195-smi-common-vdo | |
| - mediatek,mt8195-smi-common-vpp | |
| - mediatek,mt8195-smi-sub-common | |
| - mediatek,mt8365-smi-common | |
| - description: for mt7623 | |
| items: | |
| - const: mediatek,mt7623-smi-common | |
| - const: mediatek,mt2701-smi-common | |
| reg: | |
| maxItems: 1 | |
| power-domains: | |
| maxItems: 1 | |
| clocks: | |
| description: | | |
| apb and smi are mandatory. the async is only for generation 1 smi HW. | |
| gals(global async local sync) also is optional, see below. | |
| minItems: 2 | |
| items: | |
| - description: apb is Advanced Peripheral Bus clock, It's the clock for | |
| setting the register. | |
| - description: smi is the clock for transfer data and command. | |
| - description: Either asynchronous clock to help transform the smi clock | |
| into the emi clock domain on Gen1 h/w, or the path0 clock of gals. | |
| - description: gals1 is the path1 clock of gals. | |
| clock-names: | |
| minItems: 2 | |
| maxItems: 4 | |
| mediatek,smi: | |
| $ref: /schemas/types.yaml#/definitions/phandle | |
| description: a phandle to the smi-common node above. Only for sub-common. | |
| required: | |
| - compatible | |
| - reg | |
| - power-domains | |
| - clocks | |
| - clock-names | |
| allOf: | |
| - if: # only for gen1 HW | |
| properties: | |
| compatible: | |
| contains: | |
| enum: | |
| - mediatek,mt2701-smi-common | |
| then: | |
| properties: | |
| clocks: | |
| minItems: 3 | |
| maxItems: 3 | |
| clock-names: | |
| items: | |
| - const: apb | |
| - const: smi | |
| - const: async | |
| - if: # only for sub common | |
| properties: | |
| compatible: | |
| contains: | |
| enum: | |
| - mediatek,mt8195-smi-sub-common | |
| then: | |
| required: | |
| - mediatek,smi | |
| properties: | |
| clocks: | |
| minItems: 3 | |
| maxItems: 3 | |
| clock-names: | |
| items: | |
| - const: apb | |
| - const: smi | |
| - const: gals0 | |
| else: | |
| properties: | |
| mediatek,smi: false | |
| - if: # for gen2 HW that have gals | |
| properties: | |
| compatible: | |
| enum: | |
| - mediatek,mt6779-smi-common | |
| - mediatek,mt8183-smi-common | |
| - mediatek,mt8186-smi-common | |
| - mediatek,mt8192-smi-common | |
| - mediatek,mt8195-smi-common-vdo | |
| - mediatek,mt8195-smi-common-vpp | |
| - mediatek,mt8365-smi-common | |
| then: | |
| properties: | |
| clocks: | |
| minItems: 4 | |
| maxItems: 4 | |
| clock-names: | |
| items: | |
| - const: apb | |
| - const: smi | |
| - const: gals0 | |
| - const: gals1 | |
| - if: # for gen2 HW that don't have gals | |
| properties: | |
| compatible: | |
| enum: | |
| - mediatek,mt2712-smi-common | |
| - mediatek,mt6795-smi-common | |
| - mediatek,mt8167-smi-common | |
| - mediatek,mt8173-smi-common | |
| then: | |
| properties: | |
| clocks: | |
| minItems: 2 | |
| maxItems: 2 | |
| clock-names: | |
| items: | |
| - const: apb | |
| - const: smi | |
| additionalProperties: false | |
| examples: | |
| - |+ | |
| #include <dt-bindings/clock/mt8173-clk.h> | |
| #include <dt-bindings/power/mt8173-power.h> | |
| smi_common: smi@14022000 { | |
| compatible = "mediatek,mt8173-smi-common"; | |
| reg = <0x14022000 0x1000>; | |
| power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; | |
| clocks = <&mmsys CLK_MM_SMI_COMMON>, | |
| <&mmsys CLK_MM_SMI_COMMON>; | |
| clock-names = "apb", "smi"; | |
| }; |