| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: MStar Interrupt Controller | |
| maintainers: | |
| - Mark-PK Tsai <mark-pk.tsai@mediatek.com> | |
| description: |+ | |
| MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy | |
| interrupt controllers that routes interrupts to the GIC. | |
| The HW block exposes a number of interrupt controllers, each | |
| can support up to 64 interrupts. | |
| properties: | |
| compatible: | |
| const: mstar,mst-intc | |
| interrupt-controller: true | |
| "#interrupt-cells": | |
| const: 3 | |
| description: | | |
| Use the same format as specified by GIC in arm,gic.yaml. | |
| reg: | |
| maxItems: 1 | |
| mstar,irqs-map-range: | |
| description: | | |
| The range <start, end> of parent interrupt controller's interrupt | |
| lines that are hardwired to mstar interrupt controller. | |
| $ref: /schemas/types.yaml#/definitions/uint32-matrix | |
| items: | |
| minItems: 2 | |
| maxItems: 2 | |
| mstar,intc-no-eoi: | |
| description: | |
| Mark this controller has no End Of Interrupt(EOI) implementation. | |
| type: boolean | |
| required: | |
| - compatible | |
| - reg | |
| - mstar,irqs-map-range | |
| additionalProperties: false | |
| examples: | |
| - | | |
| mst_intc0: interrupt-controller@1f2032d0 { | |
| compatible = "mstar,mst-intc"; | |
| interrupt-controller; | |
| #interrupt-cells = <3>; | |
| interrupt-parent = <&gic>; | |
| reg = <0x1f2032d0 0x30>; | |
| mstar,irqs-map-range = <0 63>; | |
| }; | |
| ... |