| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
| /* |
| * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. |
| */ |
| |
| #ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_NORD_H |
| #define _DT_BINDINGS_CLK_QCOM_TCSR_CC_NORD_H |
| |
| /* TCSR_CC clocks */ |
| #define TCSR_DP_RX_0_CLKREF_EN 0 |
| #define TCSR_DP_RX_1_CLKREF_EN 1 |
| #define TCSR_DP_TX_0_CLKREF_EN 2 |
| #define TCSR_DP_TX_1_CLKREF_EN 3 |
| #define TCSR_DP_TX_2_CLKREF_EN 4 |
| #define TCSR_DP_TX_3_CLKREF_EN 5 |
| #define TCSR_PCIE_CLKREF_EN 6 |
| #define TCSR_UFS_CLKREF_EN 7 |
| #define TCSR_USB2_0_CLKREF_EN 8 |
| #define TCSR_USB2_1_CLKREF_EN 9 |
| #define TCSR_USB2_2_CLKREF_EN 10 |
| #define TCSR_USB3_0_CLKREF_EN 11 |
| #define TCSR_USB3_1_CLKREF_EN 12 |
| #define TCSR_UX_SGMII_0_CLKREF_EN 13 |
| #define TCSR_UX_SGMII_1_CLKREF_EN 14 |
| |
| #endif |
