| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ | |
| /* | |
| * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. | |
| */ | |
| #ifndef _DT_BINDINGS_CLK_QCOM_IPQ8074_CMN_PLL_H | |
| #define _DT_BINDINGS_CLK_QCOM_IPQ8074_CMN_PLL_H | |
| /* CMN PLL core clock. */ | |
| #define IPQ8074_CMN_PLL_CLK 0 | |
| /* The output clocks from CMN PLL of IPQ8074. */ | |
| #define IPQ8074_BIAS_PLL_CC_CLK 1 | |
| #define IPQ8074_BIAS_PLL_NSS_NOC_CLK 2 | |
| #endif |