| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2025 Cherry Embedded Solutions GmbH |
| * |
| * Device Tree Overlay for the Ethernet Switch adapter for the Mezzanine |
| * connector on RK3588 Jaguar |
| * (manual: https://embedded.cherry.de/jaguar-ethernet-switch-user-manual/) |
| * |
| * This adapter has a KSZ9896 Ethernet Switch with 4 1GbE Ethernet connectors, |
| * two user controllable LEDs, and an M12 12-pin connector which exposes the |
| * following signals: |
| * - RS232/RS485 (max 250Kbps/500Kbps, RX pin1, TX pin2) |
| * - two digital inputs (pin4 routed to GPIO3_C5 on SoC, pin5 to GPIO4_B4) |
| * - two digital outputs (pin7 routed to GPIO3_D3 on SoC, pin8 to GPIO3_D1) |
| * - two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2) |
| * |
| * RK3588 Jaguar can be powered entirely through the adapter via the M8 3-pin |
| * connector (12-24V). |
| */ |
| |
| /dts-v1/; |
| /plugin/; |
| |
| #include <dt-bindings/clock/rockchip,rk3588-cru.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/leds/common.h> |
| #include <dt-bindings/pinctrl/rockchip.h> |
| |
| &{/} { |
| aliases { |
| ethernet1 = "/ethernet@fe1c0000"; |
| }; |
| |
| mezzanine-leds { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&led_usr1_pin &led_usr2_pin>; |
| |
| led-1 { |
| gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; |
| label = "USR1"; |
| }; |
| |
| led-2 { |
| gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; |
| label = "USR2"; |
| }; |
| }; |
| }; |
| |
| &gmac1 { |
| clock_in_out = "output"; |
| phy-mode = "rgmii-id"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&gmac1_rx_bus2 |
| &gmac1_tx_bus2 |
| &gmac1_rgmii_clk |
| &gmac1_rgmii_bus |
| ð1_pins>; |
| rx_delay = <0x0>; |
| tx_delay = <0x0>; |
| status = "okay"; |
| |
| fixed-link { |
| speed = <1000>; |
| full-duplex; |
| }; |
| }; |
| |
| &i2c1 { |
| #address-cells = <1>; |
| /* |
| * ADS1015 can handle high-speed (HS) mode (up to 3.4MHz) on I2C bus, |
| * but SoC can handle only up to 400kHz. |
| */ |
| clock-frequency = <400000>; |
| #size-cells = <0>; |
| status = "okay"; |
| |
| adc@48 { |
| compatible = "ti,ads1015"; |
| reg = <0x48>; |
| #address-cells = <1>; |
| interrupt-parent = <&gpio3>; |
| interrupts = <RK_PC7 IRQ_TYPE_EDGE_FALLING>; |
| pinctrl-0 = <&adc_alert>; |
| pinctrl-names = "default"; |
| #io-channel-cells = <1>; |
| #size-cells = <0>; |
| |
| channel@1 { |
| reg = <5>; /* Single-ended between AIN1 and GND */ |
| ti,datarate = <0>; |
| ti,gain = <5>; |
| }; |
| |
| channel@2 { |
| reg = <6>; /* Single-ended between AIN2 and GND */ |
| ti,datarate = <0>; |
| ti,gain = <5>; |
| }; |
| }; |
| |
| switch@5f { |
| compatible = "microchip,ksz9896"; |
| reg = <0x5f>; |
| interrupt-parent = <&gpio3>; |
| interrupts = <RK_PB7 IRQ_TYPE_EDGE_FALLING>; /* ETH_INTRP_N */ |
| pinctrl-0 = <ð_reset_n ð_intrp_n>; |
| pinctrl-names = "default"; |
| reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; /* ETH_RESET */ |
| microchip,synclko-disable; /* CLKO_25_125 only routed to TP1 */ |
| |
| ethernet-ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| lan1: port@0 { |
| reg = <0>; |
| label = "ETH1"; |
| }; |
| |
| lan2: port@1 { |
| reg = <1>; |
| label = "ETH2"; |
| }; |
| |
| lan3: port@2 { |
| reg = <2>; |
| label = "ETH3"; |
| }; |
| |
| lan4: port@3 { |
| reg = <3>; |
| label = "ETH4"; |
| }; |
| |
| port@5 { |
| reg = <5>; |
| ethernet = <&gmac1>; |
| label = "CPU"; |
| phy-mode = "rgmii-id"; |
| rx-internal-delay-ps = <2000>; |
| tx-internal-delay-ps = <2000>; |
| |
| fixed-link { |
| speed = <1000>; |
| full-duplex; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &pinctrl { |
| adc { |
| adc_alert: adc-alert-irq { |
| rockchip,pins = |
| <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; |
| }; |
| }; |
| |
| ethernet { |
| eth_intrp_n: eth-intrp-n { |
| rockchip,pins = |
| <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| |
| eth_reset_n: eth-reset-n { |
| rockchip,pins = |
| <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| leds { |
| led_usr1_pin: led-usr1-pin { |
| rockchip,pins = |
| <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; |
| }; |
| |
| led_usr2_pin: led-usr2-pin { |
| rockchip,pins = |
| <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; |
| }; |
| }; |
| }; |
| |
| &uart9 { |
| /* GPIO3_D0/EN_RS485_MODE for switching between RS232 and RS485 */ |
| pinctrl-0 = <&uart9m2_xfer &uart9m2_rtsn>; |
| pinctrl-names = "default"; |
| linux,rs485-enabled-at-boot-time; |
| status = "okay"; |
| }; |