| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright 2024 Gateworks Corporation |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/leds/common.h> |
| #include <dt-bindings/phy/phy-imx8-pcie.h> |
| |
| / { |
| aliases { |
| ethernet1 = ð1; |
| fsa1 = &fsa0; |
| fsa2 = &fsa1; |
| }; |
| |
| led-controller { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpio_leds>; |
| |
| led-0 { |
| function = LED_FUNCTION_STATUS; |
| color = <LED_COLOR_ID_GREEN>; |
| gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; |
| default-state = "on"; |
| linux,default-trigger = "heartbeat"; |
| }; |
| |
| led-1 { |
| function = LED_FUNCTION_STATUS; |
| color = <LED_COLOR_ID_RED>; |
| gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; |
| default-state = "off"; |
| }; |
| }; |
| |
| pcie0_refclk: clock-pcie0 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <100000000>; |
| }; |
| |
| pps { |
| compatible = "pps-gpio"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pps>; |
| gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| reg_usb2_vbus: regulator-usb2 { |
| compatible = "regulator-fixed"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_reg_usb2_en>; |
| regulator-name = "usb2_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reg_usdhc2_vmmc: regulator-usdhc2-vmmc { |
| compatible = "regulator-fixed"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc2_vmmc>; |
| regulator-name = "VDD_3V3_SD"; |
| regulator-max-microvolt = <3300000>; |
| regulator-min-microvolt = <3300000>; |
| gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| off-on-delay-us = <12000>; |
| startup-delay-us = <100>; |
| }; |
| }; |
| |
| &ecspi2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi2>; |
| cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>, /* CS0 onboard TPM */ |
| <&gpio5 13 GPIO_ACTIVE_LOW>, /* CS1 off-board J32 SPI */ |
| <&gpio1 12 GPIO_ACTIVE_LOW>, /* CS3 off-board J52 FSA1 */ |
| <&gpio4 26 GPIO_ACTIVE_LOW>; /* CS2 off-board J51 FSA2 */ |
| status = "okay"; |
| |
| tpm@0 { |
| compatible = "atmel,attpm20p", "tcg,tpm_tis-spi"; |
| reg = <0x0>; |
| spi-max-frequency = <10000000>; |
| }; |
| }; |
| |
| &flexcan1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_can1>; |
| status = "okay"; |
| }; |
| |
| &flexcan2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_can2>; |
| status = "okay"; |
| }; |
| |
| &gpio1 { |
| gpio-line-names = |
| "", "", "", "", |
| "", "", "", "", |
| "", "", "", "", |
| "", "fsa2_gpio1", "", "", |
| "", "", "", "", |
| "", "", "", "", |
| "", "", "", "", |
| "", "", "", ""; |
| }; |
| |
| &gpio4 { |
| gpio-line-names = |
| "", "", "", "", |
| "", "", "", "", |
| "dio1", "fsa1_gpio2", "", "dio0", |
| "", "", "", "", |
| "", "", "", "", |
| "", "", "rs485_en", "rs485_term", |
| "fsa2_gpio2", "fsa1_gpio1", "", "rs485_half", |
| "", "", "", ""; |
| }; |
| |
| &i2c2 { |
| accelerometer@19 { |
| compatible = "st,lis2de12"; |
| reg = <0x19>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_accel>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <21 IRQ_TYPE_LEVEL_LOW>; |
| st,drdy-int-pin = <1>; |
| }; |
| |
| magnetometer@1e { |
| compatible = "st,lis2mdl"; |
| reg = <0x1e>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_mag>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <28 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| }; |
| |
| &i2c3 { |
| i2c-mux@70 { |
| compatible = "nxp,pca9548"; |
| reg = <0x70>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| /* J30 */ |
| fsa1: i2c@0 { |
| reg = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fsa2i2c>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| gpio@20 { |
| compatible = "nxp,pca9555"; |
| reg = <0x20>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <4 IRQ_TYPE_EDGE_FALLING>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| eeprom@54 { |
| compatible = "atmel,24c02"; |
| reg = <0x54>; |
| pagesize = <16>; |
| }; |
| |
| eeprom@55 { |
| compatible = "atmel,24c02"; |
| reg = <0x55>; |
| pagesize = <16>; |
| }; |
| }; |
| |
| /* J29 */ |
| fsa0: i2c@1 { |
| reg = <1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fsa1i2c>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| gpio@20 { |
| compatible = "nxp,pca9555"; |
| reg = <0x20>; |
| interrupt-parent = <&gpio4>; |
| interrupts = <14 IRQ_TYPE_EDGE_FALLING>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| eeprom@54 { |
| compatible = "atmel,24c02"; |
| reg = <0x54>; |
| pagesize = <16>; |
| }; |
| |
| eeprom@55 { |
| compatible = "atmel,24c02"; |
| reg = <0x55>; |
| pagesize = <16>; |
| }; |
| }; |
| |
| /* J33 */ |
| i2c@2 { |
| reg = <2>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| }; |
| }; |
| |
| &pcie_phy { |
| clocks = <&pcie0_refclk>; |
| clock-names = "ref"; |
| fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; |
| fsl,clkreq-unsupported; |
| status = "okay"; |
| }; |
| |
| &pcie { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pcie0>; |
| reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| |
| pcie@0,0 { |
| reg = <0x0000 0 0 0 0>; |
| device_type = "pci"; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| ranges; |
| |
| pcie@0,0 { |
| reg = <0x0000 0 0 0 0>; |
| device_type = "pci"; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| ranges; |
| |
| pcie@7,0 { |
| reg = <0x3800 0 0 0 0>; |
| device_type = "pci"; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| ranges; |
| |
| eth1: ethernet@0,0 { |
| reg = <0x0000 0 0 0 0>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| ranges; |
| local-mac-address = [00 00 00 00 00 00]; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| /* GPS */ |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| /* RS232 */ |
| &uart4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart4>; |
| status = "okay"; |
| }; |
| |
| /* USB1 - FSA1 */ |
| &usb3_0 { |
| fsl,permanently-attached; |
| fsl,disable-port-power-control; |
| status = "okay"; |
| }; |
| |
| &usb3_phy0 { |
| status = "okay"; |
| }; |
| |
| &usb_dwc3_0 { |
| dr_mode = "host"; |
| status = "okay"; |
| }; |
| |
| /* USB2 - USB3.0 Hub */ |
| &usb3_1 { |
| fsl,permanently-attached; |
| fsl,disable-port-power-control; |
| status = "okay"; |
| }; |
| |
| &usb3_phy1 { |
| vbus-supply = <®_usb2_vbus>; |
| status = "okay"; |
| }; |
| |
| &usb_dwc3_1 { |
| dr_mode = "host"; |
| status = "okay"; |
| }; |
| |
| /* SDIO 1.8V */ |
| &usdhc1 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc1>; |
| pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
| bus-width = <4>; |
| non-removable; |
| status = "okay"; |
| }; |
| |
| /* microSD */ |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| cd-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; /* CD is active high */ |
| bus-width = <4>; |
| vmmc-supply = <®_usdhc2_vmmc>; |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog>; |
| |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ |
| MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ |
| MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */ |
| MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */ |
| MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */ |
| >; |
| }; |
| |
| pinctrl_accel: accelgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ# */ |
| >; |
| }; |
| |
| pinctrl_can1: can1grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 |
| MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 |
| >; |
| }; |
| |
| pinctrl_can2: can2grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154 |
| MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154 |
| >; |
| }; |
| |
| pinctrl_gpio_leds: gpioledgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ |
| MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ |
| >; |
| }; |
| |
| pinctrl_fsa1i2c: fsa1i2cgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x1d0 /* FSA1_ALERT# */ |
| MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x400001d0 /* FSA1_GPIO1 */ |
| MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09 0x400001d0 /* FSA1_GPIO2 */ |
| >; |
| }; |
| |
| pinctrl_fsa2i2c: fsa2i2cgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04 0x1d0 /* FSA2_ALERT# */ |
| MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x400001d0 /* FSA2_GPIO1 */ |
| MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x400001d0 /* FSA2_GPIO2 */ |
| >; |
| }; |
| |
| pinctrl_mag: maggrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x140 /* IRQ# */ |
| >; |
| }; |
| |
| pinctrl_pcie0: pcie0grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 /* PERST# */ |
| >; |
| }; |
| |
| pinctrl_pps: ppsgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 |
| >; |
| }; |
| |
| pinctrl_reg_usb2_en: regusb2grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */ |
| >; |
| }; |
| |
| pinctrl_spi2: spi2grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0xd0 |
| MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0xd0 |
| MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0xd0 |
| MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 /* J32_CS */ |
| MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140 /* TPM_CS */ |
| MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x140 /* FSA1_CS */ |
| MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x140 /* FSA2_CS */ |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 |
| MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 |
| >; |
| }; |
| |
| pinctrl_uart4: uart4grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 |
| MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 |
| >; |
| }; |
| |
| pinctrl_usdhc1: usdhc1grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 |
| MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0 |
| MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0 |
| MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0 |
| MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0 |
| MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0 |
| >; |
| }; |
| |
| pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194 |
| MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4 |
| MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4 |
| MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4 |
| MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4 |
| MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4 |
| >; |
| }; |
| |
| pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196 |
| MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6 |
| MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6 |
| MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6 |
| MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6 |
| MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6 |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 |
| MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 |
| MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 |
| MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 |
| MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 |
| MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 |
| MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 |
| MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 |
| MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 |
| MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 |
| MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 |
| MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 |
| MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 |
| MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 |
| MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 |
| MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 |
| MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 |
| MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 |
| MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 |
| >; |
| }; |
| |
| pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x1d0 |
| >; |
| }; |
| |
| pinctrl_usdhc2_gpio: usdhc2gpiogrp { |
| fsl,pins = < |
| MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 |
| >; |
| }; |
| }; |
