| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/media/qcom,x1e80100-camss.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm X1E80100 Camera Subsystem (CAMSS) |
| |
| maintainers: |
| - Bryan O'Donoghue <bryan.odonoghue@linaro.org> |
| |
| description: |
| The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. |
| |
| properties: |
| compatible: |
| const: qcom,x1e80100-camss |
| |
| reg: |
| maxItems: 17 |
| |
| reg-names: |
| items: |
| - const: csid0 |
| - const: csid1 |
| - const: csid2 |
| - const: csid_lite0 |
| - const: csid_lite1 |
| - const: csid_wrapper |
| - const: csiphy0 |
| - const: csiphy1 |
| - const: csiphy2 |
| - const: csiphy4 |
| - const: csitpg0 |
| - const: csitpg1 |
| - const: csitpg2 |
| - const: vfe0 |
| - const: vfe1 |
| - const: vfe_lite0 |
| - const: vfe_lite1 |
| |
| clocks: |
| maxItems: 29 |
| |
| clock-names: |
| items: |
| - const: camnoc_nrt_axi |
| - const: camnoc_rt_axi |
| - const: core_ahb |
| - const: cpas_ahb |
| - const: cpas_fast_ahb |
| - const: cpas_vfe0 |
| - const: cpas_vfe1 |
| - const: cpas_vfe_lite |
| - const: cphy_rx_clk_src |
| - const: csid |
| - const: csid_csiphy_rx |
| - const: csiphy0 |
| - const: csiphy0_timer |
| - const: csiphy1 |
| - const: csiphy1_timer |
| - const: csiphy2 |
| - const: csiphy2_timer |
| - const: csiphy4 |
| - const: csiphy4_timer |
| - const: gcc_axi_hf |
| - const: gcc_axi_sf |
| - const: vfe0 |
| - const: vfe0_fast_ahb |
| - const: vfe1 |
| - const: vfe1_fast_ahb |
| - const: vfe_lite |
| - const: vfe_lite_ahb |
| - const: vfe_lite_cphy_rx |
| - const: vfe_lite_csid |
| |
| interrupts: |
| maxItems: 13 |
| |
| interrupt-names: |
| items: |
| - const: csid0 |
| - const: csid1 |
| - const: csid2 |
| - const: csid_lite0 |
| - const: csid_lite1 |
| - const: csiphy0 |
| - const: csiphy1 |
| - const: csiphy2 |
| - const: csiphy4 |
| - const: vfe0 |
| - const: vfe1 |
| - const: vfe_lite0 |
| - const: vfe_lite1 |
| |
| interconnects: |
| maxItems: 4 |
| |
| interconnect-names: |
| items: |
| - const: ahb |
| - const: hf_mnoc |
| - const: sf_mnoc |
| - const: sf_icp_mnoc |
| |
| iommus: |
| maxItems: 8 |
| |
| power-domains: |
| items: |
| - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. |
| - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. |
| - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. |
| |
| power-domain-names: |
| items: |
| - const: ife0 |
| - const: ife1 |
| - const: top |
| |
| vdd-csiphy-0p8-supply: |
| description: |
| Phandle to a 0.8V regulator supply to a PHY. |
| |
| vdd-csiphy-1p2-supply: |
| description: |
| Phandle to 1.8V regulator supply to a PHY. |
| |
| ports: |
| $ref: /schemas/graph.yaml#/properties/ports |
| |
| description: |
| CSI input ports. |
| |
| patternProperties: |
| "^port@[0-3]$": |
| $ref: /schemas/graph.yaml#/$defs/port-base |
| unevaluatedProperties: false |
| |
| description: |
| Input port for receiving CSI data from a CSIPHY. |
| |
| properties: |
| endpoint: |
| $ref: video-interfaces.yaml# |
| unevaluatedProperties: false |
| |
| properties: |
| data-lanes: |
| minItems: 1 |
| maxItems: 4 |
| |
| bus-type: |
| enum: |
| - 1 # MEDIA_BUS_TYPE_CSI2_CPHY |
| - 4 # MEDIA_BUS_TYPE_CSI2_DPHY |
| |
| required: |
| - data-lanes |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - clocks |
| - clock-names |
| - interrupts |
| - interrupt-names |
| - interconnects |
| - interconnect-names |
| - iommus |
| - power-domains |
| - power-domain-names |
| - vdd-csiphy-0p8-supply |
| - vdd-csiphy-1p2-supply |
| - ports |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/qcom,x1e80100-gcc.h> |
| #include <dt-bindings/clock/qcom,x1e80100-camcc.h> |
| #include <dt-bindings/interconnect/qcom,icc.h> |
| #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h> |
| #include <dt-bindings/power/qcom-rpmpd.h> |
| |
| soc { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| camss: isp@acb7000 { |
| compatible = "qcom,x1e80100-camss"; |
| |
| reg = <0 0x0acb7000 0 0x2000>, |
| <0 0x0acb9000 0 0x2000>, |
| <0 0x0acbb000 0 0x2000>, |
| <0 0x0acc6000 0 0x1000>, |
| <0 0x0acca000 0 0x1000>, |
| <0 0x0acb6000 0 0x1000>, |
| <0 0x0ace4000 0 0x1000>, |
| <0 0x0ace6000 0 0x1000>, |
| <0 0x0ace8000 0 0x1000>, |
| <0 0x0acec000 0 0x4000>, |
| <0 0x0acf6000 0 0x1000>, |
| <0 0x0acf7000 0 0x1000>, |
| <0 0x0acf8000 0 0x1000>, |
| <0 0x0ac62000 0 0x4000>, |
| <0 0x0ac71000 0 0x4000>, |
| <0 0x0acc7000 0 0x2000>, |
| <0 0x0accb000 0 0x2000>; |
| |
| reg-names = "csid0", |
| "csid1", |
| "csid2", |
| "csid_lite0", |
| "csid_lite1", |
| "csid_wrapper", |
| "csiphy0", |
| "csiphy1", |
| "csiphy2", |
| "csiphy4", |
| "csitpg0", |
| "csitpg1", |
| "csitpg2", |
| "vfe0", |
| "vfe1", |
| "vfe_lite0", |
| "vfe_lite1"; |
| |
| clocks = <&camcc CAM_CC_CAMNOC_AXI_NRT_CLK>, |
| <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>, |
| <&camcc CAM_CC_CORE_AHB_CLK>, |
| <&camcc CAM_CC_CPAS_AHB_CLK>, |
| <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, |
| <&camcc CAM_CC_CPAS_IFE_0_CLK>, |
| <&camcc CAM_CC_CPAS_IFE_1_CLK>, |
| <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, |
| <&camcc CAM_CC_CPHY_RX_CLK_SRC>, |
| <&camcc CAM_CC_CSID_CLK>, |
| <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, |
| <&camcc CAM_CC_CSIPHY0_CLK>, |
| <&camcc CAM_CC_CSI0PHYTIMER_CLK>, |
| <&camcc CAM_CC_CSIPHY1_CLK>, |
| <&camcc CAM_CC_CSI1PHYTIMER_CLK>, |
| <&camcc CAM_CC_CSIPHY2_CLK>, |
| <&camcc CAM_CC_CSI2PHYTIMER_CLK>, |
| <&camcc CAM_CC_CSIPHY4_CLK>, |
| <&camcc CAM_CC_CSI4PHYTIMER_CLK>, |
| <&gcc GCC_CAMERA_HF_AXI_CLK>, |
| <&gcc GCC_CAMERA_SF_AXI_CLK>, |
| <&camcc CAM_CC_IFE_0_CLK>, |
| <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, |
| <&camcc CAM_CC_IFE_1_CLK>, |
| <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, |
| <&camcc CAM_CC_IFE_LITE_CLK>, |
| <&camcc CAM_CC_IFE_LITE_AHB_CLK>, |
| <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, |
| <&camcc CAM_CC_IFE_LITE_CSID_CLK>; |
| |
| clock-names = "camnoc_nrt_axi", |
| "camnoc_rt_axi", |
| "core_ahb", |
| "cpas_ahb", |
| "cpas_fast_ahb", |
| "cpas_vfe0", |
| "cpas_vfe1", |
| "cpas_vfe_lite", |
| "cphy_rx_clk_src", |
| "csid", |
| "csid_csiphy_rx", |
| "csiphy0", |
| "csiphy0_timer", |
| "csiphy1", |
| "csiphy1_timer", |
| "csiphy2", |
| "csiphy2_timer", |
| "csiphy4", |
| "csiphy4_timer", |
| "gcc_axi_hf", |
| "gcc_axi_sf", |
| "vfe0", |
| "vfe0_fast_ahb", |
| "vfe1", |
| "vfe1_fast_ahb", |
| "vfe_lite", |
| "vfe_lite_ahb", |
| "vfe_lite_cphy_rx", |
| "vfe_lite_csid"; |
| |
| interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 431 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, |
| <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>; |
| |
| interrupt-names = "csid0", |
| "csid1", |
| "csid2", |
| "csid_lite0", |
| "csid_lite1", |
| "csiphy0", |
| "csiphy1", |
| "csiphy2", |
| "csiphy4", |
| "vfe0", |
| "vfe1", |
| "vfe_lite0", |
| "vfe_lite1"; |
| |
| interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY |
| &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, |
| <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS |
| &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, |
| <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS |
| &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, |
| <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS |
| &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; |
| |
| interconnect-names = "ahb", |
| "hf_mnoc", |
| "sf_mnoc", |
| "sf_icp_mnoc"; |
| |
| iommus = <&apps_smmu 0x800 0x60>, |
| <&apps_smmu 0x860 0x60>, |
| <&apps_smmu 0x1800 0x60>, |
| <&apps_smmu 0x1860 0x60>, |
| <&apps_smmu 0x18e0 0x00>, |
| <&apps_smmu 0x1980 0x20>, |
| <&apps_smmu 0x1900 0x00>, |
| <&apps_smmu 0x19a0 0x20>; |
| |
| power-domains = <&camcc CAM_CC_IFE_0_GDSC>, |
| <&camcc CAM_CC_IFE_1_GDSC>, |
| <&camcc CAM_CC_TITAN_TOP_GDSC>; |
| |
| power-domain-names = "ife0", |
| "ife1", |
| "top"; |
| |
| vdd-csiphy-0p8-supply = <&csiphy_0p8_supply>; |
| vdd-csiphy-1p2-supply = <&csiphy_1p2_supply>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| csiphy_ep0: endpoint { |
| data-lanes = <0 1>; |
| remote-endpoint = <&sensor_ep>; |
| }; |
| }; |
| }; |
| }; |
| }; |
