| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/mailbox/rockchip,rk3368-mailbox.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Rockchip RK3368 Mailbox Controller |
| |
| maintainers: |
| - Heiko Stuebner <heiko@sntech.de> |
| |
| description: |
| The Rockchip mailbox is used by the Rockchip CPU cores to communicate |
| requests to MCU processor. |
| |
| properties: |
| compatible: |
| const: rockchip,rk3368-mailbox |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| const: pclk_mailbox |
| |
| interrupts: |
| description: One interrupt for each channel |
| maxItems: 4 |
| |
| '#mbox-cells': |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - '#mbox-cells' |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| |
| mailbox@ff6b0000 { |
| compatible = "rockchip,rk3368-mailbox"; |
| reg = <0xff6b0000 0x1000>; |
| interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
| #mbox-cells = <1>; |
| }; |