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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/mediatek/mediatek,color.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek color processor
maintainers:
- Matthias Brugger <matthias.bgg@gmail.com>
description: |
MediaTek color processor, namely COLOR, provides hue, luma and saturation
adjustments to get better picture quality and to have one panel
resemble the other in their output characteristics.
COLOR device node must be siblings to the central MMSYS_CONFIG node.
For a description of the MMSYS_CONFIG binding, see
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
for details.
properties:
compatible:
oneOf:
- items:
- const: mediatek,mt2701-disp-color
- items:
- const: mediatek,mt8167-disp-color
- items:
- const: mediatek,mt8173-disp-color
- items:
- enum:
- mediatek,mt7623-disp-color
- mediatek,mt2712-disp-color
- enum:
- mediatek,mt2701-disp-color
- items:
- enum:
- mediatek,mt8183-disp-color
- mediatek,mt8192-disp-color
- mediatek,mt8195-disp-color
- enum:
- mediatek,mt8173-disp-color
reg:
maxItems: 1
interrupts:
maxItems: 1
power-domains:
description: A phandle and PM domain specifier as defined by bindings of
the power controller specified by phandle. See
Documentation/devicetree/bindings/power/power-domain.yaml for details.
clocks:
items:
- description: COLOR Clock
mediatek,gce-client-reg:
description:
The register of client driver can be configured by gce with 4 arguments
defined in this property, such as phandle of gce, subsys id,
register offset and size.
Each subsys id is mapping to a base address of display function blocks
register which is defined in the gce header
include/dt-bindings/gce/<chip>-gce.h.
$ref: /schemas/types.yaml#/definitions/phandle-array
maxItems: 1
required:
- compatible
- reg
- interrupts
- power-domains
- clocks
additionalProperties: false
examples:
- |
color0: color@14013000 {
compatible = "mediatek,mt8173-disp-color";
reg = <0 0x14013000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
clocks = <&mmsys CLK_MM_DISP_COLOR0>;
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x3000 0x1000>;
};