| // SPDX-License-Identifier: (GPL-2.0 or MIT) |
| /* |
| * Device Tree Source for the Spider CPU board |
| * |
| * Copyright (C) 2021 Renesas Electronics Corp. |
| */ |
| |
| #include "r8a779f0.dtsi" |
| |
| / { |
| model = "Renesas Spider CPU board"; |
| compatible = "renesas,spider-cpu", "renesas,r8a779f0"; |
| |
| memory@48000000 { |
| device_type = "memory"; |
| /* first 128MB is reserved for secure area. */ |
| reg = <0x0 0x48000000 0x0 0x78000000>; |
| }; |
| |
| memory@480000000 { |
| device_type = "memory"; |
| reg = <0x4 0x80000000 0x0 0x80000000>; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <20000000>; |
| }; |
| |
| &extalr_clk { |
| clock-frequency = <32768>; |
| }; |
| |
| &i2c4 { |
| pinctrl-0 = <&i2c4_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| eeprom@50 { |
| compatible = "rohm,br24g01", "atmel,24c01"; |
| label = "cpu-board"; |
| reg = <0x50>; |
| pagesize = <8>; |
| }; |
| }; |
| |
| &pfc { |
| pinctrl-0 = <&scif_clk_pins>; |
| pinctrl-names = "default"; |
| |
| i2c4_pins: i2c4 { |
| groups = "i2c4"; |
| function = "i2c4"; |
| }; |
| |
| scif0_pins: scif0 { |
| groups = "scif0_data", "scif0_ctrl"; |
| function = "scif0"; |
| }; |
| |
| scif3_pins: scif3 { |
| groups = "scif3_data", "scif3_ctrl"; |
| function = "scif3"; |
| }; |
| |
| scif_clk_pins: scif_clk { |
| groups = "scif_clk"; |
| function = "scif_clk"; |
| }; |
| }; |
| |
| &rwdt { |
| timeout-sec = <60>; |
| status = "okay"; |
| }; |
| |
| &scif0 { |
| pinctrl-0 = <&scif0_pins>; |
| pinctrl-names = "default"; |
| |
| uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &scif3 { |
| pinctrl-0 = <&scif3_pins>; |
| pinctrl-names = "default"; |
| |
| uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &scif_clk { |
| clock-frequency = <24000000>; |
| }; |