| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| |
| $id: http://devicetree.org/schemas/display/msm/hdmi.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm Adreno/Snapdragon HDMI output |
| |
| maintainers: |
| - Rob Clark <robdclark@gmail.com> |
| |
| properties: |
| compatible: |
| enum: |
| - qcom,hdmi-tx-8084 |
| - qcom,hdmi-tx-8660 |
| - qcom,hdmi-tx-8960 |
| - qcom,hdmi-tx-8974 |
| - qcom,hdmi-tx-8994 |
| - qcom,hdmi-tx-8996 |
| |
| clocks: |
| minItems: 1 |
| maxItems: 5 |
| |
| clock-names: |
| minItems: 1 |
| maxItems: 5 |
| |
| reg: |
| minItems: 1 |
| maxItems: 3 |
| |
| reg-names: |
| minItems: 1 |
| items: |
| - const: core_physical |
| - const: qfprom_physical |
| - const: hdcp_physical |
| |
| interrupts: |
| maxItems: 1 |
| |
| phys: |
| maxItems: 1 |
| |
| phy-names: |
| enum: |
| - hdmi_phy |
| - hdmi-phy |
| deprecated: true |
| |
| core-vdda-supply: |
| description: phandle to VDDA supply regulator |
| |
| hdmi-mux-supply: |
| description: phandle to mux regulator |
| deprecated: true |
| |
| core-vcc-supply: |
| description: phandle to VCC supply regulator |
| |
| hpd-gpios: |
| maxItems: 1 |
| description: hpd pin |
| |
| qcom,hdmi-tx-mux-en-gpios: |
| maxItems: 1 |
| deprecated: true |
| description: HDMI mux enable pin |
| |
| qcom,hdmi-tx-mux-sel-gpios: |
| maxItems: 1 |
| deprecated: true |
| description: HDMI mux select pin |
| |
| qcom,hdmi-tx-mux-lpm-gpios: |
| maxItems: 1 |
| deprecated: true |
| description: HDMI mux lpm pin |
| |
| '#sound-dai-cells': |
| const: 1 |
| |
| ports: |
| type: object |
| $ref: /schemas/graph.yaml#/properties/ports |
| properties: |
| port@0: |
| $ref: /schemas/graph.yaml#/$defs/port-base |
| description: | |
| Input endpoints of the controller. |
| |
| port@1: |
| $ref: /schemas/graph.yaml#/$defs/port-base |
| description: | |
| Output endpoints of the controller. |
| |
| required: |
| - port@0 |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - reg |
| - reg-names |
| - interrupts |
| - phys |
| |
| allOf: |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - qcom,hdmi-tx-8960 |
| - qcom,hdmi-tx-8660 |
| then: |
| properties: |
| clocks: |
| minItems: 3 |
| maxItems: 3 |
| clock-names: |
| items: |
| - const: core |
| - const: master_iface |
| - const: slave_iface |
| core-vcc-supplies: false |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - qcom,hdmi-tx-8974 |
| - qcom,hdmi-tx-8084 |
| - qcom,hdmi-tx-8994 |
| - qcom,hdmi-tx-8996 |
| then: |
| properties: |
| clocks: |
| minItems: 5 |
| clock-names: |
| items: |
| - const: mdp_core |
| - const: iface |
| - const: core |
| - const: alt_iface |
| - const: extp |
| hdmi-mux-supplies: false |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| hdmi: hdmi@4a00000 { |
| compatible = "qcom,hdmi-tx-8960"; |
| reg-names = "core_physical"; |
| reg = <0x04a00000 0x2f0>; |
| interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; |
| clock-names = "core", |
| "master_iface", |
| "slave_iface"; |
| clocks = <&clk 61>, |
| <&clk 72>, |
| <&clk 98>; |
| hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>; |
| core-vdda-supply = <&pm8921_hdmi_mvs>; |
| hdmi-mux-supply = <&ext_3p3v>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&hpd_active &ddc_active &cec_active>; |
| pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>; |
| |
| phys = <&hdmi_phy>; |
| }; |
| - | |
| #include <dt-bindings/clock/qcom,gcc-msm8996.h> |
| #include <dt-bindings/clock/qcom,mmcc-msm8996.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| hdmi@9a0000 { |
| compatible = "qcom,hdmi-tx-8996"; |
| reg = <0x009a0000 0x50c>, |
| <0x00070000 0x6158>, |
| <0x009e0000 0xfff>; |
| reg-names = "core_physical", |
| "qfprom_physical", |
| "hdcp_physical"; |
| |
| interrupt-parent = <&mdss>; |
| interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; |
| |
| clocks = <&mmcc MDSS_MDP_CLK>, |
| <&mmcc MDSS_AHB_CLK>, |
| <&mmcc MDSS_HDMI_CLK>, |
| <&mmcc MDSS_HDMI_AHB_CLK>, |
| <&mmcc MDSS_EXTPCLK_CLK>; |
| clock-names = "mdp_core", |
| "iface", |
| "core", |
| "alt_iface", |
| "extp"; |
| |
| phys = <&hdmi_phy>; |
| #sound-dai-cells = <1>; |
| |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>; |
| pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>; |
| |
| core-vdda-supply = <&vreg_l12a_1p8>; |
| core-vcc-supply = <&vreg_s4a_1p8>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| endpoint { |
| remote-endpoint = <&mdp5_intf3_out>; |
| }; |
| }; |
| }; |
| }; |
| ... |
