| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Device Tree Source for the V3H Starter Kit board |
| * |
| * Copyright (C) 2018 Renesas Electronics Corp. |
| * Copyright (C) 2018 Cogent Embedded, Inc. |
| */ |
| |
| /dts-v1/; |
| #include "r8a77980.dtsi" |
| |
| / { |
| model = "Renesas V3H Starter Kit board"; |
| compatible = "renesas,v3hsk", "renesas,r8a77980"; |
| |
| aliases { |
| serial0 = &scif0; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@48000000 { |
| device_type = "memory"; |
| /* first 128MB is reserved for secure area. */ |
| reg = <0 0x48000000 0 0x78000000>; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <16666666>; |
| }; |
| |
| &extalr_clk { |
| clock-frequency = <32768>; |
| }; |
| |
| &pfc { |
| scif0_pins: scif0 { |
| groups = "scif0_data"; |
| function = "scif0"; |
| }; |
| |
| scif_clk_pins: scif_clk { |
| groups = "scif_clk_b"; |
| function = "scif_clk"; |
| }; |
| }; |
| |
| &scif0 { |
| pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &scif_clk { |
| clock-frequency = <14745600>; |
| }; |